Ferroelectric Capacitive Synapse Array for Low-Power Neural Networks
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Solution Overview
Problem
Conventional hardware neural networks face high power consumption due to the need for continuous current feeding in synapse devices, especially with increased integration.
Innovation Solution
A neural network configuration using ferroelectric capacitors as synapse devices, where capacitances are set and retrieved through different voltage applications in training and retrieval phases, reducing the need for continuous current feeding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of synapse devices is increased for high integration, then the functionality and capacity of the neural network is improved, but power consumption increases due to continuous current feeding requirements
Solution Approach 1:
The patent replaces the conventional current-based synapse device with a voltage-based capacitor device. Instead of using variable resistance elements that require continuous current feeding, the invention uses capacitive coupling between electrode lines to store and retrieve synaptic weights. This substitution of the underlying physical mechanism eliminates the need for continuous power supply while maintaining the ability to store and process neural network weights, thereby resolving the contradiction between integration capacity and power consumption.
Solution Approach 2:
The patent changes the operational parameter from current-based resistance modulation to voltage-based capacitance modulation. By applying different voltages to the electrode lines, the capacitive coupling strength between them is modulated, effectively encoding synaptic weights. This parameter change allows the system to achieve high integration without the continuous power consumption associated with maintaining current flow through variable resistance elements.
2Reliability
If conventional variable resistance elements are used as synapse devices, then data storage functionality is achieved, but continuous current feeding is required leading to high power consumption
Solution Approach 1:
The patent substitutes the resistive memory mechanism with a capacitive coupling mechanism. Instead of storing data as resistance values that require continuous current to maintain, the invention stores synaptic weights as capacitive coupling strengths between electrode lines. The capacitors naturally hold their charge state without continuous power supply, eliminating energy loss while preserving reliable data storage functionality through the voltage state of the capacitive coupling.
Solution Approach 2:
The capacitive coupling structure inherently maintains its state without external power input. The stored voltage charges on the capacitors self-maintain the synaptic weight information through electrostatic field storage, requiring no active power consumption for data retention. This self-service characteristic directly addresses the energy loss problem while maintaining reliable data storage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces power consumption while maintaining data storage and retrieval efficiency, even with high integration of synapse devices.
Implementation Method 1
The first electrode lines and the second electrode lines are capacitively coupled to form synapse devices at intersections in a plan view
Implementation Method 2
The ferroelectric layer is arranged between the first electrode lines and the second electrode lines
Data Source
AI summary
A neural network includes first electrode lines in parallel, second electrode lines in parallel, a ferroelectric layer, neuron circuits, a first direction control circuit, and a second direction control circuit. The second electrode lines extend in a direction different from the first electrode lines. The ferroelectric layer is arranged between the first electrode lines and the second electrode lines. The neuron circuits are provided in the first electrode lines, respectively. The first direction control circuit is connected between the neuron circuits and the first electrode lines. The second direction control circuit is connected between the neuron circuits and the second electrode lines. The first electrode lines and the second electrode lines are capacitively coupled to form synapse devices at intersections in a plan view, each of the intersections being a portion where a first electrode line and a second electrode line intersect with each other.