Ferroelectric Layer Integration for Threshold-Based Non-Volatile Memory
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Solution Overview
Problem
Current semiconductor devices lack efficient non-volatile memory solutions that leverage the reversible polarization properties of ferroelectric materials for storage, limiting their ability to store and retrieve data effectively.
Innovation Solution
A semiconductor device incorporating a ferroelectric layer between the channel region and the gate electrode of a field effect transistor, allowing for write operations by applying a write voltage to store different polarization states, which are then read through threshold voltage changes, enabling reliable signal storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric layer is integrated into the semiconductor device, then non-volatile memory functionality is enabled with efficient data storage and retrieval, but device structure and manufacturing process become more complex
Solution Approach 1:
The ferroelectric layer is integrated within the existing transistor structure, nested between the channel region and the gate electrode. This allows the memory functionality to be embedded within the processor core area without requiring separate dedicated memory structures, thereby enabling non-volatile storage while minimizing additional device complexity
Solution Approach 2:
The gate electrode serves dual functions: as the control electrode for the transistor operation and as the read/write electrode for the ferroelectric memory cell. This multi-functionality reduces the need for additional specialized structures, allowing the same component to handle both logic control and memory operations
2Reliability
If a ferroelectric layer is integrated into the semiconductor device, then non-volatile memory functionality is enabled with efficient data storage and retrieval, but manufacturing process steps increase
Solution Approach 1:
The ferroelectric layer is formed on the channel region before the gate electrode is deposited. This preliminary formation allows the gate electrode to simultaneously serve as both the transistor control electrode and the memory write/read electrode, eliminating the need for subsequent complex electrode formation steps and simplifying the overall manufacturing process
Solution Approach 2:
The formation of the gate electrode and the write electrode for the ferroelectric memory cell are merged into a single deposition step. This combining of functions reduces the total number of manufacturing steps, as the same electrode structure performs both transistor gating and memory programming functions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The integration of a ferroelectric layer in the semiconductor device enables non-volatile memory functionality, allowing for efficient storage and retrieval of data by utilizing the reversible polarization states, enhancing data retention and access speeds.
Implementation Method 1
In the ferroelectric material, when an external electric field is applied, the electrical polarization may exhibit hysteresis behavior. Accordingly, by controlling the applied external electric field, various polarizations may be reversibly implemented in the ferroelectric material following the hysteresis behavior.
Data Source
AI summary
A semiconductor device according to an embodiment includes a substrate, a bit line structure and a source line structure respectively extending in a direction perpendicular to a surface of the substrate, a semiconductor layer disposed between the bit line structure and the source line structure on a plane parallel to the surface of the substrate, a first ferroelectric layer disposed on a first surface of the semiconductor layer, and a first gate electrode layer disposed on the first ferroelectric layer.