FET Channel Blocking Region for Short-Channel Leakage Control
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Solution Overview
Problem
Field effect transistors with short channel lengths experience degradation in threshold voltage and sub-threshold characteristics due to short-channel effects, leading to increased off-state current and degraded transfer characteristics.
Innovation Solution
Incorporating a carrier blocking region with a lower dielectric constant than the channel region, either as a dielectric material filled in a trench or formed by ion implantation, to prevent carrier flow from the source to the drain when the device is turned off, thereby blocking carriers and reducing short-channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gate length is reduced to achieve higher integration density, then productivity increases, but short-channel effects worsen causing threshold voltage degradation and increased off-state current
Solution Approach 1:
The patent introduces a carrier blocking region with different material properties (lower dielectric constant) located specifically in the channel region. This local modification creates a barrier that selectively blocks carriers in the off-state while maintaining device functionality in the on-state, thus improving reliability without sacrificing integration density
Solution Approach 2:
The carrier blocking region acts as an intermediary structure between the source and drain regions. By introducing this intermediate element with specific electrical properties, the patent mediates the carrier flow to prevent direct carrier injection from source to drain in the off-state, thereby suppressing short-channel effects while maintaining the scaled dimensions
2Productivity
If the gate length is reduced to achieve higher integration density, then productivity increases, but off-state current increases due to degraded subthreshold characteristics
Solution Approach 1:
The carrier blocking region is introduced locally in the channel region with distinct material properties (lower dielectric constant). This local modification creates a potential barrier that specifically targets and blocks carrier flow in the off-state, thereby reducing the harmful off-state current while maintaining the scaled device dimensions for high integration density
Solution Approach 2:
The patent converts the harmful short-channel effect into a beneficial feature by strategically placing the carrier blocking region. The same physical phenomenon that causes threshold voltage degradation is harnessed to create a carrier barrier that improves off-state current characteristics, turning the short-channel effect from a problem into a solution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The carrier blocking region effectively suppresses off-state current and improves transfer and output characteristics by forming a barrier to carrier flow, enhancing the device's subthreshold swing and reducing carrier impact ionization effects.
Implementation Method 1
The channel region is provided with a carrier blocking region, and the carrier blocking region serves to block carriers moving from the source region to the drain region when the device is turned off
Implementation Method 2
an interface of the carrier blocking region and the channel region forms a barrier for preventing carriers from entering the carrier blocking region
Implementation Method 3
the carrier blocking region is an insulating region or a semi-insulating region formed by ion implantation or doping in the channel region
Implementation Method 4
the carrier blocking region is an insulating region or a semi-insulating region formed by ion implantation or doping in the channel region
Data Source
AI summary
The present invention discloses a field effect transistor device with a blocking region, which aims to address the problem of short channel effects of a field effect transistor in the prior art. The field effect transistor device includes an active layer, the active layer including a source region, a drain region and a channel region located between the source region and the drain region, wherein the channel region is provided with a carrier blocking region. The carrier blocking region serves to block carriers moving from the source region to the drain region when the device is turned off.