FET Inrush Current Limiter With Adaptive Gate Voltage Control
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Solution Overview
Problem
Existing inrush current limiting circuits using field effect transistors (FETs) face challenges in safely controlling the main switch across a wide supply voltage range, as they require a low gate-source voltage, making it difficult to manage inrush currents effectively in battery systems with varying voltage levels.
Innovation Solution
The inrush current limiter employs a gate driver with a voltage divider circuit, a capacitor, and a high voltage limiter with a variable resistor to adjust the turn-on time of the FET and limit voltage rise, along with a feedback controller and low voltage releaser to manage voltage drops across a wide input voltage range, ensuring stable operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a field effect transistor (FET) with low on-resistance is used as main switch for limiting inrush current, then voltage drop is maintained low after blocking inrush current, but the gate-source voltage must be maintained at high level (10V or more) which exceeds the maximum voltage range for safe control
Solution Approach 1:
A voltage divider circuit is introduced as an intermediary between the power source and the FET gate terminal. This voltage divider circuit steps down the high input voltage to a safe gate-source voltage level (10V or less) that remains within the maximum voltage range for reliable FET control, while still enabling the FET to maintain low on-resistance and minimize voltage drop during normal operation.
Solution Approach 2:
The invention dynamically adjusts the resistance values in the voltage divider circuit based on the input voltage level. When input voltage exceeds a predetermined threshold, the voltage divider ratio is modified to ensure the gate-source voltage remains within safe limits. This parameter change allows the circuit to adapt to varying input conditions while maintaining both low voltage drop and safe control.
2Productivity
If the gate-source voltage is maintained at high level to achieve low on-resistance, then inrush current can be effectively blocked, but it becomes difficult to safely control the FET in battery systems with wide supply voltage range
Solution Approach 1:
The voltage divider circuit is designed with dynamic resistance elements that automatically adjust their resistance values based on the input voltage level. This dynamic adjustment ensures that regardless of whether the battery system operates at low voltage or high voltage within its wide supply range, the gate-source voltage remains within the safe control range while maintaining effective inrush current blocking capability.
Solution Approach 2:
The invention changes the electrical parameters (resistance values) of the voltage divider circuit components based on the input voltage conditions. This parameter adaptation enables the FET to be safely controlled across the entire wide supply voltage range of battery systems, from low voltage states to high voltage states, without requiring different FETs or control circuits.
3Reliability
If voltage divider circuit is used to reduce gate-source voltage to safe level, then FET can be controlled safely, but the turn-on time of FET is delayed due to capacitor charging time
Solution Approach 1:
The voltage divider circuit is configured to begin charging the capacitor immediately when input voltage is applied, preparing the gate voltage in advance. The resistance values are optimized so that the capacitor charges to the required gate threshold voltage quickly, reducing the turn-on delay while still maintaining safe voltage levels. This preliminary action ensures the FET is ready to switch as soon as the voltage conditions are met.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for effective inrush current limitation across a wide voltage range, minimizing voltage drops and ensuring safe operation of the FET switch, thereby stabilizing the system without the need for circuit changes based on power source specifications.
Implementation Method 1
a first capacitor connected between the first input node and the control terminal of the field effect transistor, and configured to adjust a time until the field effect transistor may be turned-on after the input voltage may be input
Implementation Method 2
a high voltage limiter including a third resistor connected in parallel with the first resistor and having a resistance value varied according to a voltage between the first input node and the control terminal of the field effect transistor, and configured to limit a voltage rise between the first input node and the control terminal of the field effect transistor by varying resistance value of the third resistor
Data Source
AI summary
An inrush current limiter includes: first and second input nodes receiving an input voltage from a power source; first and second output nodes connected to a load; a field effect transistor connected between the first input node and the first output node; a gate driver comprising a first voltage divider circuit comprising a first resistor connected between the first input node and a control terminal of the field effect transistor and a second resistor connected between the control terminal of the field effect transistor and the second input node, and a first capacitor connected between the first input node and the control terminal of the field effect transistor, and adjusting a time until the field effect transistor is turned-on after the input voltage is input; and a high voltage limiter comprising a third resistor connected in parallel with the first resistor and having variable a resistance value.