FET Analog Arithmetic Circuit Using Linear-Region Multiplication
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Solution Overview
Problem
Existing analog circuits for signal multiplication or division, such as Gilbert cells and logarithmic operational amplifier circuits, face challenges in balancing implementation complexity, power consumption, and output signal quality.
Innovation Solution
An analog arithmetic circuit utilizing field effect transistors operated in a linear range, where the gate-source voltage adjusts the drain-source voltage and drain current ratios to achieve multiplication or division operations, eliminating the need for digital signal processing and reducing complexity and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If digital signal processing is used for multiplication or division, then processing capability is improved, but power consumption increases significantly
Solution Approach 1:
The patent replaces digital signal processing (electronic/computational system) with an analog field-effect transistor circuit (physical/electrical system). The multiplication and division operations are performed through analog voltage and current relationships in the FET linear region, eliminating the need for digital processors and ADC/DAC converters, thus significantly reducing power consumption while maintaining processing capability.
2Device complexity
If Gilbert cell is used for signal multiplication, then implementation is simplified, but output signal quality deteriorates due to differential input requirements
Solution Approach 1:
The patent changes the operating parameters of the field-effect transistor from saturation region to linear region operation. This parameter change enables single-ended input operation while maintaining good output signal quality, as the linear region provides a controlled relationship between drain current and drain-source voltage that can be modulated by gate-source voltage to achieve accurate multiplication without the limitations of differential inputs.
3Adaptability or versatility
If logarithmic operational amplifier circuit is used for multiplication, then mathematical operation capability is improved, but device complexity increases due to multiple operational amplifiers and diodes
Solution Approach 1:
The patent extracts and utilizes only the essential linear region characteristics of the field-effect transistor, removing the need for complex logarithmic function generation circuits, multiple operational amplifiers, and diodes. By focusing on the direct voltage-controlled current relationship in the linear region, the circuit achieves multiplication capability with minimal components, significantly reducing circuit complexity while maintaining mathematical operation functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit achieves efficient multiplication or division operations with low power consumption and high precision, offering a compromise between complexity and performance, suitable for various applications including power measurement and control.
Implementation Method 1
the current flow (typically the drain current) has a substantially linear dependence on the drain-source voltage, wherein the relationship between the drain-source voltage and the drain current can be adjusted by the gate-source voltage
Data Source
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AI summary
An analog circuit is designed to set the gate-source voltage (UGS) of an output field-effect transistor (120;T1_2;T2_2), operating in a linear region, as a function of at least one input signal (110;VINA, VINA,VREF, VREF). The analog circuit is also designed to obtain an output signal (114;VOUT, VOUT) as a function of the current flow (ID) through the output field-effect transistor (T1_2;T2_2), where the drain-source voltage (VGS;UGS) of the output field-effect transistor is determined by a second input signal (114;VINB,VINB). Alternatively, the analog computing circuit is designed to obtain an output signal (114; VOUT, VOUT) as a function of a drain-source voltage (VDS; UDS) of the output-side field-effect transistor (120;T1_2;T2_2), wherein a drain current (ID) of the output-side field-effect transistor (120;T1_2;T2_2) is determined by a second input signal (114;VINB,VINB).