FET Voltage Reference Circuit for Small-Area Stable Output
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Solution Overview
Problem
Bandgap voltage references using bipolar junction transistors occupy a large amount of space on a semiconductor chip, and there is a need for a simpler and more reliable voltage reference that does not consume excessive chip space while maintaining good characteristics.
Innovation Solution
A voltage reference apparatus formed by field effect transistors (FETs) with a configuration of resistors and negative and positive threshold transistors, generating a reference voltage through a series connection and utilizing the gate-to-source voltage of FETs to minimize chip space and provide a stable output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a bandgap voltage reference using bipolar junction transistors is used, then voltage reference accuracy is improved, but chip area occupied increases
Solution Approach 1:
The patent changes the fundamental parameters of the voltage reference circuit by using FETs instead of bipolar junction transistors, and by utilizing the gate-to-source voltage characteristic of FETs which is inherently more temperature-stable. This parameter change allows achieving voltage reference functionality with reduced chip area while maintaining or improving accuracy
Solution Approach 2:
The patent employs a simpler FET-based circuit topology that requires fewer components and less chip real estate compared to traditional bandgap references. The circuit uses basic FET characteristics that are readily available in standard semiconductor processes, eliminating the need for complex bipolar transistor structures and large resistor networks
2Area of stationary object
If a simple voltage reference circuit is used to reduce chip space, then chip area is reduced, but voltage reference stability may deteriorate
Solution Approach 1:
The FET-based voltage reference circuit utilizes the inherent gate-to-source voltage characteristic of FETs, which naturally exhibits excellent temperature stability due to the physics of field-effect transistors. The circuit essentially serves itself by leveraging the intrinsic properties of FETs rather than requiring external compensation mechanisms
Solution Approach 2:
The patent demonstrates that FETs can serve multiple functions: they provide both the voltage reference output through their gate-to-source voltage and can be configured in various topologies (series connection, parallel connection, or combination) to achieve different performance characteristics, making the solution universally applicable across different design requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The FET-based voltage reference circuit occupies less chip space, offers fast transient performance, and is suitable for applications requiring precision and accuracy, with the option to add trim circuitry for higher precision when needed.
Implementation Method 1
A FET includes four terminals, namely a source, a drain, a gate and a body/bulk. The source and the drain are connected to the ends of a conducting channel. The gate terminal is used to control the conductivity of the channel. When a voltage is applied to the gate terminal, it creates an electric field that modulates the conductivity of the channel
Data Source
AI summary
An apparatus includes a first resistor, a first negative threshold transistor, a second resistor and a second negative threshold transistor coupled in series between a first voltage bus and a second voltage bus, and a first positive threshold transistor connected between a common node of the second resistor and the first negative threshold transistor, and the first voltage bus, wherein a first reference voltage is generated on a first reference voltage bus, and wherein the first reference voltage bus is coupled to a common node of a drain/source terminal of the second negative threshold transistor and the second resistor.


