FET Voltage Reference Circuit With Near-Zero Temperature Coefficient
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Solution Overview
Problem
The miniaturization of integrated circuits poses challenges in achieving precise temperature compensation for reference voltages due to stringent design and manufacturing requirements, necessitating improved reliability and efficiency in voltage reference circuits.
Innovation Solution
A voltage reference circuit utilizing stacked gate devices with field-effect transistors, comprising temperature-sensitive devices that generate complementary-to-absolute-temperature (CTAT) and proportional-to-absolute-temperature (PTAT) gate-to-source voltages, compensated by a bias current, and a trimming circuit for fine-tuning temperature sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the integrated circuit is miniaturized to increase functionality and operating speed, then device density and integration are improved, but temperature compensation precision and reliability deteriorate due to stringent design and manufacturing requirements
Solution Approach 1:
The voltage reference circuit is segmented into multiple stacked gate devices (first stacked gate device, second stacked gate device, third stacked gate device) with distinct functions. Each device comprises multiple field-effect transistors connected in series, allowing independent optimization of temperature compensation without compromising overall circuit performance. This segmentation enables precise temperature coefficient control while maintaining miniaturization benefits.
Solution Approach 2:
The patent utilizes parameter changes in the stacked gate devices by varying the number of field-effect transistors in each stack (different numbers of series-connected transistors) to achieve complementary temperature dependencies. The gate-to-source voltages are engineered to have opposite temperature coefficients, and by adjusting transistor counts and device dimensions, the circuit achieves near-zero overall temperature coefficient despite miniaturized dimensions.
2Measurement precision
If stacked gate devices with multiple field-effect transistors are used to achieve temperature compensation, then temperature coefficient control is improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
Multiple field-effect transistors are merged into stacked gate devices with common gate terminals, combining their temperature-sensitive characteristics to generate complementary voltage responses. The first, second, and third stacked gate devices are combined in the voltage reference circuit to produce gate-to-source voltages that compensate for each other's temperature drift, achieving precise temperature control through unified device operation.
Solution Approach 2:
The stacked gate devices utilize their own inherent temperature-dependent electrical characteristics to automatically compensate for temperature variations. The gate-to-source voltages generated by the stacked devices inherently contain complementary temperature coefficients, eliminating the need for external temperature sensing or complex control mechanisms. The circuit self-regulates temperature effects through the natural physical properties of the field-effect transistors.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a self-compensated reference voltage with minimal temperature coefficient, enhancing accuracy and reliability by adjusting the number of stacked transistors and finger structures, achieving a temperature coefficient of approximately 0 and reducing inaccuracy to 1.5%.
Implementation Method 1
A first stacked gate device...generates a first gate-to-source voltage that monotonically decreases with an absolute temperature of the voltage reference circuit. A second stacked gate device...generates a second gate-to-source voltage that monotonically decreases with the absolute temperature
Data Source
AI summary
An integrated circuit is provided, which includes a first temperature-sensitive device and a second temperature-sensitive device. The first temperature-sensitive device is configured to generate a reference voltage at an output terminal of the integrated circuit. The second temperature-sensitive device is coupled to the output terminal of the integrated circuit through a resistor, and configured to operate in conjunction with the first temperature-sensitive device to generate a first bias current flowing from the output terminal of the integrated circuit to a ground node through the resistor and the first temperature-sensitive device. The first bias current monotonically increases as an absolute temperature of the integrated circuit increases.


