Feed-Forward Equalization Tap Configuration for Signal Integrity

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Solution Overview

Problem

High-speed serial interfaces face challenges in maintaining signal integrity and reducing power consumption due to signal degradation and the need for additional receiver-side compensation, which increases power consumption and complexity.

Innovation Solution

The implementation of a feed-forward equalization (FFE) module with a main tap and secondary taps, where the sum of absolute values of compensation values is optimized to unity or greater than unity, allowing for proactive signal compensation and reduced power consumption by adjusting tap settings based on bit error rate and receiver eye characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If receiver-side compensation is increased to maintain signal integrity, then signal quality is improved, but power consumption and device complexity increase

Engineering Contradiction:
Improvesignal integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by implementing feed-forward equalization at the transmitter before signal transmission. The FFE module pre-compensates for channel impairments by applying equalization coefficients to the transmitted signal, eliminating the need for aggressive receiver-side compensation and thereby reducing receiver power consumption while maintaining signal integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary approach by adding a FFE module as a separate equalization stage between the transmitter and the channel. This intermediary component handles the compensation function that would otherwise require increased receiver-side processing, thus reducing the complexity and power consumption of the receiver while maintaining signal quality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If receiver-side compensation is increased to maintain signal integrity, then signal quality is improved, but device complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidreceiver complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by implementing feed-forward equalization at the transmitter before signal transmission. The FFE module pre-compensates for channel impairments by applying equalization coefficients to the transmitted signal, eliminating the need for aggressive receiver-side compensation and thereby reducing receiver complexity while maintaining signal integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary approach by adding a FFE module as a separate equalization stage between the transmitter and the channel. This intermediary component handles the compensation function that would otherwise require increased receiver-side processing, thus reducing the complexity of the receiver while maintaining signal quality.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If feed-forward equalization compensation values are optimized to unity gain, then signal margins are enhanced, but power consumption increases

Engineering Contradiction:
Improvesignal marginsVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the equalization coefficients of the FFE module based on channel conditions. Instead of using fixed unity gain, the system optimizes the compensation values by monitoring bit error rates and receiver eye characteristics, changing the parameters to achieve the best performance with minimal power consumption.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements dynamics by making the equalization coefficients adaptive rather than static. The FFE module continuously adjusts its tap weights based on real-time channel conditions, bit error rate feedback, and receiver eye pattern analysis, allowing the system to optimize the balance between signal margin enhancement and power consumption dynamically.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10298420B1System and method to enhance feed-forward equalization in a high-speed serial interface
Publication Date: 2019.05.21 DELL PROD LP
  • US10298420B1 patent drawing
  • US10298420B1 patent drawing
  • US10298420B1 patent drawing

AI summary

A high-speed serial data interface includes a transmitter and a receiver. The transmitter includes a feed-forward equalization (FFE) module. The FFE module has a main tap and at least one secondary tap. In a first mode, a sum of absolute values of a main tap compensation value and a secondary tap compensation value of each one of the at least one secondary tap is equal to one. In a second mode, the main tap compensation value has a unity gain equal to one, and each secondary tap compensation value is greater than or equal to the secondary tap compensation value in the first mode divided by the main tap compensation value in the first mode.