FFT Processing-in-Memory Lane Mapping Eliminates Cross-Bank Traffic
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Solution Overview
Problem
Conventional processing-in-memory (PIM) architectures face inefficiencies due to increased data transfer latency and reduced memory bandwidth when executing fast Fourier transforms (FFTs) due to the need for cross-lane and inter-bank communication, which is often unavailable due to hardware complexity and cost concerns.
Innovation Solution
The host processing unit offloads batches of independent FFTs to PIM units, mapping interacting elements of FFTs to specific banks and lanes, eliminating the need for cross-lane and inter-bank communication by aligning elements directly in memory, thereby reducing traffic on the connection between the processing unit and memory module.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional PIM architectures use cross-lane and inter-bank communication to execute FFTs, then processing capability is improved, but hardware complexity and cost increase
Solution Approach 1:
The patent extracts and eliminates the need for cross-lane and inter-bank communication mechanisms from the PIM architecture. By redesigning the memory mapping to store interacting elements within the same lane and bank, the solution removes these complex communication pathways while maintaining FFT processing capability through lane-aligned memory organization.
Solution Approach 2:
The patent segments the FFT processing into independent batches that can be handled by individual PIM units without requiring coordination across lanes or banks. Each batch is mapped to specific lanes and banks, allowing independent processing and eliminating the need for complex cross-lane and inter-bank communication infrastructure.
2Manufacturing precision
If PIM-shift commands are used to align interacting elements, then data alignment is improved, but memory bandwidth consumption increases
Solution Approach 1:
The patent performs preliminary action by pre-aligning interacting elements in the memory during the mapping phase. Instead of requiring PIM-shift commands to align data during processing, the memory is organized in advance so that interacting elements are automatically positioned in the correct lanes and banks, eliminating the need for subsequent alignment operations and reducing memory bandwidth consumption.
3Ease of operation
If host-initiated cross-bank communication is used to localize elements, then data localization is improved, but traffic on the connection increases
Solution Approach 1:
The patent implements self-service by allowing the PIM units to directly access and process elements from their local memory banks without requiring host intervention for data localization. The memory mapping is designed so that interacting elements are already positioned in the correct banks for each PIM unit, enabling autonomous processing without host-initiated cross-bank communication or additional traffic on the connection.
Data Source
AI summary
Fast Fourier transforms for processing-in-memory are described. In accordance with the described techniques, a computing device includes a memory, a host processing unit, and a processing-in-memory unit that operates on data of one or more banks of the memory. The host processing unit stores interacting elements of a fast Fourier transform at locations in the one or more banks. The locations are mapped to a lane of the processing-in-memory unit. The host processing unit issues processing-in-memory commands instructing the processing-in-memory unit to load the interacting elements from the locations into the lane of the processing-in-memory unit, and execute an operation on the interacting elements.