Field Programmable Transistor Array Logic Density and Power Optimization
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Solution Overview
Problem
Current field-programmable integrated circuits, such as FPGAs, face limitations in logic density, leading to increased power consumption and size, and pose security risks due to exposure of intellectual property during manufacturing, which can result in theft or malicious modification of integrated circuit designs.
Innovation Solution
A field-programmable transistor array (FPTA) is introduced, comprising programmable logic cells with transistors that can be configured after manufacturing, allowing for dynamic reconfiguration and integration with standard ASIC logic, enabling chip- and board-level virtualization, and providing enhanced security through obfuscation and protection of sensitive design elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If FPGAs are used to provide programmable flexibility, then adaptability is improved, but logic density deteriorates and device size increases
Solution Approach 1:
The invention segments the FPGA architecture into two distinct parts: a compressed logic array that provides high logic density for fixed functions, and a separate reconfigurable fabric that provides programmable flexibility. This segmentation allows each part to be optimized independently, resolving the contradiction between adaptability and device size.
Solution Approach 2:
The invention merges the compressed logic array with the reconfigurable fabric into a unified FPGA device, combining the high logic density of fixed logic with the programmable flexibility of traditional FPGAs. This merging allows the device to achieve both high adaptability and efficient space utilization.
2Adaptability or versatility
If FPGAs are used to provide programmable flexibility, then adaptability is improved, but power consumption increases
Solution Approach 1:
The invention segments the power consumption into two parts: the compressed logic array consumes minimal power for fixed functions, while the reconfigurable fabric consumes power only when actively reconfigured. This segmentation resolves the contradiction by minimizing overall power consumption while maintaining programmable flexibility.
Solution Approach 2:
The invention uses a minimal reconfigurable fabric that can be rapidly reconfigured for different functions and then discarded, allowing the system to achieve adaptability with minimal permanent hardware overhead, thereby reducing power consumption.
3Area of stationary object
If transistors are individually programmed to be always on or always off, then logic density is improved, but adaptability deteriorates
Solution Approach 1:
The invention segments the transistor array into individually programmed transistors for fixed logic functions and a separate reconfigurable fabric for adaptable functions. This segmentation allows high logic density in the fixed portion while maintaining adaptability in the reconfigurable portion.
Solution Approach 2:
The reconfigurable fabric serves multiple functions by being programmable to implement different logic functions as needed, while the individually programmed transistors provide fixed high-density logic. This multi-functionality resolves the contradiction between logic density and adaptability.
Data Source
AI summary
Illustrative embodiments provide a mixed programmable and application-specific integrated circuit, a method of using the mixed programmable and application-specific integrated circuit and a method of making the mixed programmable and application-specific integrated circuit. The mixed programmable and application-specific integrated circuit includes at least a portion of a programmable transistor array that is programed after fabrication. The programmable transistor array can include at least another portion that is mask programed during fabrication.