Field Termination Layout for Monolithic Power Die Isolation

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Solution Overview

Problem

The existing field termination structures for power semiconductor devices are inefficient, leading to reduced die area utilization and increased costs for low-current rating devices, and are complicated by the monolithic integration of different semiconductor devices.

Innovation Solution

A field termination structure for power semiconductor devices that includes a first part designed for bidirectional electric potential gradients to prevent space charge regions from reaching adjacent devices and a second part for unidirectional gradients to prevent space charge regions from reaching the edge of the semiconductor substrate, optimizing the die area usage and enhancing the integration of different semiconductor devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a field termination structure is added to minimize electric field enhancement, then breakdown voltage approaches the ideal parallel plane value, but die area utilization ratio decreases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddie area utilization ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The field termination structure is divided into multiple doped regions (first doped region, second doped region, third doped region) with different doping concentrations and geometries. Each segment serves a specific function: the first doped region provides voltage blocking, the second doped region provides isolation, and the third doped region provides edge termination. This segmentation allows optimization of each region's contribution to breakdown voltage while minimizing total area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the field termination structure have different doping concentrations and geometries tailored to their specific functions. The first doped region has higher doping concentration near the active area to provide strong voltage blocking, while the second and third doped regions have lower doping concentrations to provide isolation and edge termination with minimal area. This local quality optimization reduces the overall area required for field termination.

Inventive Principle:
Principle #3Local quality

2Reliability

If the die area for field termination is reduced proportionally less than active area when current rating is reduced, then area utilization ratio further decreases, but voltage blocking capability must be maintained

Engineering Contradiction:
Improvevoltage blocking capabilityVSAvoidarea utilization ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The field termination structure uses a dynamic doping concentration profile that adapts to different operating conditions. The first doped region has a doping concentration that decreases with depth, allowing it to provide strong voltage blocking at high voltages while requiring minimal area at low voltages. This dynamic characteristic allows the structure to maintain voltage blocking capability across different current ratings without proportionally increasing area.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the doping concentration parameter across different regions and depths of the field termination structure. The first doped region has higher doping concentration near the surface that decreases with depth, the second doped region has intermediate doping concentration, and the third doped region has lower doping concentration. This parameter optimization allows the structure to provide full voltage blocking capability with minimal area, especially beneficial for low-current rating devices.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If monolithic integration of different power semiconductor devices is implemented, then device complexity increases, but area utilization should improve

Engineering Contradiction:
Improvedevice integrationVSAvoidfield termination design complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The field termination structure is designed as a universal multi-functional structure that can serve different types of power semiconductor devices (IGBTs, MOSFETs, diodes) integrated on the same die. The first doped region provides voltage blocking for all devices, the second doped region provides isolation between different device types, and the third doped region provides edge termination. This universal design reduces the complexity of designing separate field termination structures for each device type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The second doped region acts as an intermediary between different types of power semiconductor devices and the third doped region serves as a mediator between the active areas and the die edge. These intermediary regions provide isolation and transition zones that allow different device types to be monolithically integrated without interfering with each other's field termination requirements, simplifying the overall integration design.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230387195A1Field termination structure for monolithically integrated power semiconductor devices
Publication Date: 2023.11.30 INFINEON TECHNOLOGIES AG
  • US20230387195A1 patent drawing
  • US20230387195A1 patent drawing
  • US20230387195A1 patent drawing

AI summary

A semiconductor die includes: a semiconductor substrate; power semiconductor devices formed in the semiconductor substrate; and a field termination structure interposed between adjacent ones of the power semiconductor devices and between the power semiconductor devices and an edge of the semiconductor substrate. The field termination structure includes: a first part that is designed for a bidirectional electric potential gradient during operation of the power semiconductor devices and configured to prevent a space charge region that arises in one power semiconductor device from reaching an adjacent power semiconductor device under both directions of the bidirectional electric potential gradient; and a second part that is designed for a unidirectional electric potential gradient during operation of the power semiconductor devices and configured to prevent a space charge region that arises in a power semiconductor device from reaching the edge of the semiconductor substrate under a single direction of the unidirectional electric potential gradient.