Multi-Queue FIFO Memory Read Counters for Queue Switching

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Solution Overview

Problem

Conventional multi-queue FIFO memory systems face challenges in accurately determining the number of read operations performed on a present queue without prediction or forced data output during queue switches, leading to inefficiencies and the need for processing data during transition cycles.

Innovation Solution

A multi-queue memory device with a read queue register file that stores read count pointers for each queue, allowing accurate counting of read operations and generation of empty flags, eliminating the need for pipeline schemes or forced-word-fall-through restrictions during queue switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a pipeline scheme or forced-word-fall-through restriction is used during queue switches, then accurate read operation counting can be achieved, but data processing must occur during transition cycles and system complexity increases

Engineering Contradiction:
Improveread operation counting accuracyVSAvoidpipeline scheme complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the read operation counting function into separate counters for each queue (present queue counter and new queue counter). This segmentation allows independent tracking of read operations in each queue without requiring complex pipeline schemes or forced-word-fall-through restrictions, thereby achieving accurate counting while reducing system complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism (counter register file and control logic) that mediates between the queue switch operation and the read operation counting. This intermediary tracks read operations accurately during queue switches without requiring data processing during transition cycles, resolving the contradiction between measurement precision and device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If queue switching is performed without prediction or forced data output, then operational efficiency improves, but accurate determination of read operations becomes difficult

Engineering Contradiction:
Improveoperational efficiencyVSAvoidread operation counting accuracy
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent implements feedback mechanisms where counters continuously monitor and update the number of read operations performed on each queue. This feedback allows the system to accurately determine read operation counts without requiring prediction or forced data output during queue switches, thereby maintaining both high operational efficiency and measurement precision

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The counter system performs self-service by automatically tracking read operations through dedicated counters that increment with each read operation. This self-service mechanism eliminates the need for external prediction or forced-word-fall-through restrictions, allowing accurate counting while maintaining operational efficiency

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS7870310B2Multiple counters to relieve flag restriction in a multi-queue first-in first-out memory system
Publication Date: 2011.01.11 INTEGRATED DEVICE TECH INC
  • US7870310B2 patent drawing
  • US7870310B2 patent drawing
  • US7870310B2 patent drawing

AI summary

A method of operating a multi-queue device, including: (1) storing a plurality of read (write) count pointers, wherein each of the read (write) count pointers is associated with a corresponding queue of the multi-queue device, (2) providing a read (write) count pointer associated with a present queue to read (write) flag logic, (3) adjusting the read (write) count pointer associated with the present queue in response to each read (write) operation performed by the present queue, (4) indicating a read (write) queue switch from the present queue to a next queue, (5) retrieving a read (write) count pointer associated with the next queue; and then (6) simultaneously providing the read (write) count pointer associated with the present queue and the read (write) count pointer associated with the next queue to the read (write) flag logic.