Filtering Manager for Virtual Hardware Memory Access Redirection

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Solution Overview

Problem

Conventional hardware emulation and software simulation systems fail to address performance issues arising from illegal memory addressing in embedded systems drivers, making it difficult to prototype and test virtual hardware models without modifying driver source code.

Innovation Solution

A filtering manager is used to identify and restructure software instructions based on execution results, redirecting illegal memory access to legal locations, allowing device drivers to function with virtual hardware models without source code modifications, and optionally controlling memory access and handling indirect addressing and multiple-processor applications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional hardware emulation and software simulation systems are used, then system prototyping is enabled, but performance issues arise from illegal memory addressing in device drivers

Engineering Contradiction:
Improvecompatibility of device drivers with virtual hardware modelsVSAvoidperformance stability due to illegal memory addressing
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces an intermediary layer (emulation layer) between the device driver and the virtual hardware model. This emulation layer intercepts illegal memory access instructions from the device driver, translates them into valid memory access operations, and redirects them to appropriate memory locations. This allows the device driver to function correctly with virtual hardware models without modifying the driver source code, thereby resolving the contradiction between driver compatibility and system reliability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes memory address parameters by maintaining mapping tables that translate illegal hard-coded addresses in device drivers to legal virtual memory addresses. When the system detects an illegal memory access attempt, it modifies the address parameter on-the-fly by looking up the corresponding valid address in the mapping table, allowing the operation to proceed without causing performance issues or system failures

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If device driver source code is modified to alter hard coded addresses, then compatibility with virtual hardware models is improved, but ease of operation and system flexibility deteriorate

Engineering Contradiction:
Improvecompatibility of device drivers with virtual hardware modelsVSAvoidease of driver modification and system flexibility
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The emulation layer serves as a transparent intermediary that sits between the unmodified device driver and the virtual hardware model. It automatically handles address translation without requiring any modifications to the driver source code, thus maintaining ease of operation while achieving compatibility. The driver continues to use its original hard-coded addresses, and the emulation layer transparently resolves them to valid addresses

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system creates a virtual copy of the hardware interface that mimics the behavior of the physical hardware at the memory address level. This virtual interface is mapped to legal memory locations and presents the same operational characteristics to the device driver, allowing the driver to operate as if accessing real hardware without actually doing so, thereby preserving system flexibility while ensuring compatibility

Inventive Principle:
Principle #26Copying

3Difficulty of detecting and measuring

If exception handling trace messages are enabled, then debugging capability is improved, but processing performance deteriorates due to error report generation

Engineering Contradiction:
Improvedebugging capability for exception handlingVSAvoidprocessing performance
Core Design Contradiction:
Difficulty of detecting and measuringVSProductivity

Solution Approach 1:

The system implements selective trace message generation by the exception handler. Instead of generating trace messages for all exceptions, it only generates messages for specific types of exceptions or under certain conditions. This partial action approach maintains adequate debugging capability for critical issues while avoiding the performance penalty of generating excessive trace messages for routine or expected exceptions

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The exception handling system dynamically adjusts its trace message generation behavior based on the current operational context. It can switch between verbose debugging mode and performance-optimized mode, generating detailed trace messages when in debugging sessions and suppressing them during normal operation or when performance is critical, thus balancing debugging capability with processing performance

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7356456B1Computer storage exception handing apparatus and method for virtual hardware system
Publication Date: 2008.04.08 PARAVIRTUAL CORP
  • US7356456B1 patent drawing
  • US7356456B1 patent drawing
  • US7356456B1 patent drawing

AI summary

In a design system using virtual hardware models, a filtering manager for filtering execution results and determining which software instructions are candidates for restructuring. In some examples, illegal address range instructions are identified based on exception records and restructured software instructions may redirect memory access to an appropriate memory location thereby enabling the use of hardware device drivers in conjunction with hardware emulations, simulations or virtual models without requiring driver source code modifications. Using different filtering criteria, some or all legal and/or illegal memory access software instructions may be redirected to mapped memory locations enabling control over memory access functions. In some cases, debugging tools may be configured or altered to reduce, limit or disable exception handling trace messages, thereby improving overall processing performance by eliminating or reducing unnecessary or burdensome error or trace report generation.