Fin Diode Junction Area Expansion via Localized Parameter Changes
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Solution Overview
Problem
The reduction in fin size for finFET devices in integrated circuits leads to increased defects and reduced junction area due to dopant implantation damage and difficulty in implanting dopants on lower fin portions, affecting the operating speed and density of diodes.
Innovation Solution
A fin diode structure is developed with increased junction area by forming a doped anode region on the surface and a cathode region within the fin, allowing for contiguous dopant implantation across multiple fins, which enhances the reach of the implantation process and reduces defects, using a process that includes forming mandrels, spacers, and etching to define fins with increased width and pitch, followed by dopant implantation and contact formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fin size is reduced to increase density, then device density improves, but dopant implantation damage increases and junction area decreases
Solution Approach 1:
The patent changes the physical dimensions of the fin structure by increasing fin width and pitch in the diode region compared to the transistor region. This parameter change allows sufficient space for effective dopant implantation while maintaining high overall device density through optimized spatial arrangement of different fin configurations.
Solution Approach 2:
The patent applies different fin dimensions to different functional regions: narrower fins in the transistor region for maximum density and wider fins in the diode region for adequate dopant implantation. This local differentiation resolves the contradiction by optimizing each region's fin geometry for its specific functional requirements.
2Productivity
If fin width is reduced to increase density, then device density improves, but junction area decreases due to difficulty in implanting dopants on lower fin portions
Solution Approach 1:
The patent increases the fin width parameter specifically in the diode region to ensure that the lower portions of the fins are accessible to dopant implantation processes. This localized parameter increase maintains adequate junction area while the overall compact layout preserves high device density.
Solution Approach 2:
The patent utilizes the pitch dimension (spacing between fins) in addition to fin width to create sufficient implantation access. By increasing both width and pitch in the diode region, the patent provides multiple dimensional pathways for achieving adequate junction area without compromising overall density.
3Productivity
If fin aspect ratio is increased to improve density, then device density improves, but dopant implantation on lower fin portions becomes difficult
Solution Approach 1:
The patent modifies the aspect ratio parameter by increasing fin width in the diode region, which reduces the aspect ratio compared to high-density transistor regions. This parameter adjustment makes the lower fin portions more accessible to implantation processes while maintaining overall high density through compact circuit layout and optimized fin pitch.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in a fin diode with an expanded junction area, reducing defects and improving the implantation process, thereby enhancing the operating speed and density of diodes in integrated circuits.
Implementation Method 1
the dopant implantation process can damage the tip portions of the fin, resulting in increased defects and reduced junction area
Data Source
AI summary
A diode includes a plurality of fins defined in a semiconductor substrate. An anode region is defined by a doped region in a first surface portion of each of the plurality of fins and in a second surface portion of the semiconductor substrate disposed between adjacent fins in the plurality of fins. The doped region includes a first dopant having a first conductivity type and is contiguous between the adjacent fins. A cathode region is defined by an inner portion of each of the plurality of fins positioned below and contacting the first surface portion and a third portion of the semiconductor substrate positioned below and contacting the second surface portion. The cathode region is contiguous and the dopants in the cathode region and anode region have opposite conductivity types. A junction is defined between the anode region and the cathode region. A first contact interfaces with the anode region.