Fin Insulating Spacer Design for Integrated Circuit Reliability

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Solution Overview

Problem

The miniaturization of semiconductor devices leads to defects such as short circuits in dense and irregular structures, degrading the reliability and operation accuracy of semiconductor devices, necessitating optimized transistor structures for enhanced performance.

Innovation Solution

An integrated circuit device with a substrate having distinct areas for different fin-type active regions, each with specific recesses and isolation layers, and fin insulating spacers of varying heights to secure different electrical properties and prevent short circuits, fabricated using a low-cost simplified process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If semiconductor devices are miniaturized to achieve faster operation speeds, then operation speed is improved, but defects such as short circuits occur in dense and irregular structure areas, degrading reliability

Engineering Contradiction:
Improveoperation speedVSAvoiddevice reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies local quality by forming fin insulating spacers selectively in specific regions (first area) where short circuits are more likely to occur, while omitting them in other regions (second area). This localized approach addresses reliability issues in critical areas without unnecessarily complicating the overall device structure, thereby maintaining operation speed while improving reliability where needed.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The substrate is divided into multiple areas (first area and second area) with different fin insulating spacer configurations. This segmentation allows different regions to have optimized structures tailored to their specific functional requirements, enabling the device to achieve both high speed operation and improved reliability in critical zones.

Inventive Principle:
Principle #1Segmentation

2Reliability

If fin insulating spacers are formed in all areas to prevent short circuits, then reliability is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of uniformly forming fin insulating spacers across the entire substrate, the patent selectively forms them only in the first area where short circuit risks are higher. This local quality approach improves reliability in critical regions while avoiding the added complexity and cost that would result from universal application.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies the principle of partial action by forming fin insulating spacers in only the first area rather than in all areas. This partial application provides sufficient reliability improvement to prevent short circuits in critical regions without the excessive complexity and manufacturing cost that would arise from complete coverage.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If different electrical properties are secured for unit devices through selective fin insulating spacer formation, then reliability is enhanced, but manufacturing process complexity increases

Engineering Contradiction:
Improvedevice reliabilityVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent achieves different electrical properties for unit devices by selectively forming fin insulating spacers in the first area while omitting them in the second area. This local differentiation provides the necessary electrical property variations for improved reliability while using a relatively simple manufacturing approach that does not significantly increase process complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10128155B2Integrated circuit device and method of fabricating the same
Publication Date: 2018.11.13 SAMSUNG ELECTRONICS CO LTD
  • US10128155B2 patent drawing
  • US10128155B2 patent drawing
  • US10128155B2 patent drawing

AI summary

An integrated circuit device includes: a first fin-type active region in a first area of a substrate, the first fin-type active region having a first recess filled with a first source/drain region; a first device isolation layer covering both lower sidewalls of the first fin-type active region; a second fin-type active region in a second area of the substrate, the second fin-type active region having a second recess filled with a second source/drain region; a second device isolation layer covering both lower sidewalls of the second fin-type active region; and a fin insulating spacer on the first device isolation layer, the fin insulating spacer covering a sidewall of the first fin-type active region under the first source/drain region.