Fin Resistor Structure for FinFET Integration
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Solution Overview
Problem
The semiconductor industry faces challenges in developing a compatible structure and fabrication process for resistors that integrate with FinFET technology, as existing methods do not efficiently accommodate the formation of resistors within the shrinking device size and complex IC designs.
Innovation Solution
A fin resistor structure is developed using alternating patterns of epitaxial semiconductor regions and fins, where in-situ doped epitaxial regions form endpoints and dopants diffuse into fins to control resistance, allowing for precise resistance value adjustment through fin thickness and dopant concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional resistor fabrication methods are used, then resistor formation is achieved, but compatibility with FinFET technology and integration within shrinking device sizes is poor
Solution Approach 1:
The patent merges resistor formation with FinFET fabrication by using the same fin structures for both transistor gates and resistor elements. The alternating pattern of doped and undoped fins creates both functional devices and resistors from a single structural platform, eliminating the need for separate resistor fabrication processes and improving compatibility with FinFET technology.
Solution Approach 2:
The fin structures serve multiple functions: they act as gates for FinFET transistors when properly doped, and as resistor elements when arranged in alternating doped/undoped patterns. This multi-functionality allows the same structural platform to support both high-performance transistors and precise resistors, reducing overall device complexity and improving integration.
2Productivity
If device size is decreased to increase transistor density, then transistor density improves, but resistor formation becomes more difficult
Solution Approach 1:
By combining resistor formation with the existing fin structure fabrication process, the patent enables resistor creation at the same miniaturized scale as transistors without requiring additional manufacturing steps. The alternating fin pattern naturally scales with device size, maintaining ease of manufacture even as dimensions shrink to increase density.
Solution Approach 2:
The patent controls resistor values by adjusting parameters such as fin width, dopant concentration, and the number of alternating fin pairs. These parameter changes allow precise resistance control within the miniaturized device architecture, enabling resistor formation to remain easy and controllable even as overall device size decreases for higher density.
3Manufacturing precision
If alternating pattern of epitaxial regions and fins is used, then resistance control precision improves, but fabrication process complexity increases
Solution Approach 1:
The patent achieves precise resistance control by adjusting fabrication parameters such as dopant concentration in epitaxial regions, fin width, and the number of alternating pairs. These parameter changes allow continuous tuning of resistance values without fundamentally changing the fabrication process, maintaining relative simplicity while achieving high manufacturing precision.
Solution Approach 2:
The alternating doped and undoped fin pattern is established during the epitaxial growth stage, before subsequent processing steps. This preliminary action of creating the resistance-determining structure early in the process simplifies later fabrication steps, as the resistance profile is already defined and only requires confirmation and connection to contacts.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of resistors that are compatible with FinFET technology, allowing for precise resistance control and integration within existing FinFET CMOS flows without additional process steps, thereby enhancing transistor density and performance.
Implementation Method 1
performing an anneal to diffuse dopants from the epitaxial semiconductor regions into the plurality of fins
Implementation Method 2
forming a plurality of in-situ doped epitaxial semiconductor regions on the substrate adjacent to each of the plurality of fins
Data Source
AI summary
A fin resistor and method of fabrication are disclosed. The fin resistor comprises a plurality of fins arranged in a linear pattern with an alternating pattern of epitaxial regions. An anneal diffuses dopants from the epitaxial regions into the fins. Contacts are connected to endpoint epitaxial regions to allow the resistor to be connected to more complex integrated circuits.