Fin Transistor Threshold Voltage Adjustment via Corner Implantation
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the significant variability of threshold voltage in multiple gate transistors compared to planar transistors, particularly for different gate lengths, leading to increased manufacturing complexity and costs due to separate implantation processes for counter-doping species.
Innovation Solution
A method is introduced to adjust the dopant concentration locally in the corner areas of semiconductor fins using an ion implantation process with a hard mask, allowing for individual control of threshold voltage behavior in multiple gate transistors without affecting planar transistors, thereby achieving matching threshold voltage characteristics for both types of transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If separate implantation processes are used for counter-doping species in multiple gate transistors, then threshold voltage variability is reduced, but manufacturing complexity and costs increase
Solution Approach 1:
The patent applies local quality by selectively placing counter-doped corner regions only in multiple gate transistors where they are needed. The corner regions are formed with specific geometry (extending from the fin top surface down to a first depth) and are positioned only in the corner areas of the semiconductor fin, allowing localized threshold voltage adjustment without affecting the entire transistor or requiring separate processing for all transistor types.
Solution Approach 2:
The patent segments the doping process by separating the counter-doping into distinct corner regions that are geometrically defined and spatially separated from the main channel area. This segmentation allows the counter-doping to be applied independently to specific corner locations using selective masking and implantation, rather than requiring a comprehensive separate process for the entire transistor structure.
2Ease of manufacture
If common dopant profiles are used for drain and source regions, then manufacturing complexity is reduced, but threshold voltage control in multiple gate transistors is affected
Solution Approach 1:
The patent maintains common dopant profiles for drain and source regions in the bulk areas, simplifying manufacturing. However, it introduces localized counter-doped corner regions with different dopant concentrations specifically in the corner areas of multiple gate transistors. This local quality modification allows threshold voltage control in critical corner regions while maintaining process simplicity for the majority of the transistor structure.
Solution Approach 2:
The patent applies partial action by implementing counter-doping only in the corner regions rather than throughout the entire drain and source regions. The counter-doped corner regions extend from the fin top surface down to a first depth, leaving the bulk of the drain and source regions with common dopant profiles. This partial application achieves the necessary threshold voltage control while minimizing additional manufacturing complexity.
3Manufacturing precision
If ion implantation is used for counter-doping, then dopant concentration can be precisely controlled, but process complexity increases
Solution Approach 1:
The patent applies preliminary action by forming the corner regions with defined geometry before performing the ion implantation process. The corner regions are created by etching or other preparatory steps that establish the precise spatial boundaries where counter-doping will occur. This preliminary structuring allows the subsequent ion implantation to be performed with standard processes while achieving precise dopant concentration control in the predetermined corner locations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process by allowing common dopant profiles for drain and source regions, reducing overall complexity and improving threshold voltage matching between multiple gate and planar transistors, while maintaining superior control over threshold voltage characteristics.
Implementation Method 1
performing an implantation process to incorporate a dopant species at and near a surface of the semiconductor region, while using the hard mask as an implantation mask
Data Source
AI summary
When forming sophisticated multiple gate transistors and planar transistors in a common manufacturing sequence, the threshold voltage characteristics of the multiple gate transistors may be intentionally “degraded” by selectively incorporating a dopant species into corner areas of the semiconductor fins, thereby obtaining a superior adaptation of the threshold voltage characteristics of multiple gate transistors and planar transistors. In advantageous embodiments, the incorporation of the dopant species may be accomplished by using the hard mask, which is also used for patterning the self-aligned semiconductor fins.