Fin-Structured Transistor Etching Residue Control via Resist Masking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In fin-structured transistors, the formation of etching residues at step portions between fins and element isolation regions leads to short-circuit defects and reduced reliability due to thicker film thickness, which complicates the manufacturing process and yields suboptimal semiconductor device performance.
Innovation Solution
The method involves forming a resist pattern that surrounds the fins with a predetermined interval, allowing for controlled etching of the insulating film to reduce the thickness uniformly, thereby minimizing the formation of etching residues and maintaining the flatness of the polysilicon film, ensuring the polysilicon film can be embedded in recess portions without impairing its surface flatness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fins protruding from the semiconductor substrate are formed, then the transistor performance is improved, but a step portion is generated causing thicker film thickness and etching residue formation
Solution Approach 1:
The patent applies preliminary action by forming a resist pattern on the insulating film before etching, where the pattern is specifically designed with a predetermined interval from the fin to prevent the etching solution from reaching the step portion. This pre-planned protective arrangement ensures that the subsequent etching process does not create residues at the problematic step area, thus maintaining film thickness uniformity while preserving the fin structure's performance benefits
Solution Approach 2:
The resist pattern serves as an intermediary element between the etching solution and the insulating film at the step portion. By positioning the resist pattern at a predetermined interval from the fin, it acts as a barrier that prevents the etching solution from directly contacting the step portion, thereby eliminating the root cause of etching residue formation without affecting the fin structure's functionality
2Reliability
If a film is formed and patterned to cover the step portion, then the step portion is covered, but the film thickness becomes thick leading to etching residue generation
Solution Approach 1:
The patent extracts the problematic step portion from the etching process by using a resist pattern that prevents the etching solution from contacting this area. Instead of trying to modify the step portion itself or add complex multi-layer films to cover it, the solution removes the step portion from the etching zone entirely through the protective resist pattern, simplifying the overall manufacturing process while maintaining device reliability
3Manufacturing precision
If the insulating film thickness is reduced, then etching residue formation is suppressed, but the film may not adequately cover the step portion
Solution Approach 1:
The patent applies local quality by creating a spatially differentiated structure where the resist pattern is positioned at a predetermined interval from the fin, providing localized protection only at the critical step portion area. This allows the insulating film to maintain its necessary thickness for adequate coverage while the resist pattern locally prevents etching residue formation at the step portion, thus satisfying both requirements simultaneously
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of the semiconductor device by preventing short-circuit defects and improving manufacturing yield by suppressing etching residue formation and maintaining the flatness of the polysilicon film, thus ensuring better performance and reduced defects.
Implementation Method 1
the insulating film is etched while a part of an upper surface of the insulating film is covered with a pattern
Data Source
AI summary
A method for manufacturing a semiconductor device includes a step of reducing a thickness of a silicon oxide film embedded in an element isolation trench including fins in order to form protruded fins. In the step, the silicon oxide film is etched while covering part of an upper surface of the silicon oxide film with a resist pattern. At this time, the resist pattern is formed such that a distance between the fin and the resist pattern is equal to or less than a predetermined interval which is an arrangement interval of the plurality of fins.


