Fin-Type Semiconductor Source/Drain Contact Resistance Reduction

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Solution Overview

Problem

As semiconductor devices become more densely integrated, the contact resistance of source/drain contacts increases, leading to delays in signal propagation and higher power consumption.

Innovation Solution

A semiconductor device design featuring fin-type active patterns with gate electrodes and trench regions, where a source/drain contact includes a first insulating layer and a metal oxide layer, with a heat treatment process to diffuse oxygen from the insulating layers into the metal layer, reducing resistance and improving interface quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor devices are densely integrated, then device integration density is improved, but contact resistance of source/drain contacts increases

Engineering Contradiction:
Improvedevice integration densityVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent changes the physical and chemical parameters of the contact structure by forming a metal oxide layer with specific oxygen concentration and using heat treatment to diffuse oxygen into the metal layer, thereby modifying the electrical properties to reduce contact resistance while maintaining high integration density

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite structure consisting of a metal layer and a metal oxide layer with different dielectric constants, where the metal oxide layer serves as an oxygen reservoir and the metal layer provides low resistance, creating a composite material system that optimizes both conductivity and interface quality

Inventive Principle:
Principle #40Composite materials

2Speed

If contact resistance is reduced, then signal propagation speed is improved, but power consumption increases

Engineering Contradiction:
Improvesignal propagation speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent optimizes the balance between contact resistance and power consumption by controlling the oxygen diffusion parameters and metal oxide layer characteristics, achieving a state where signal propagation is enhanced without excessive power consumption increase

Inventive Principle:
Principle #35Parameter changes

3Reliability

If heat treatment is performed to diffuse oxygen, then interface quality is improved, but process complexity increases

Engineering Contradiction:
Improveinterface qualityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary heat treatment to diffuse oxygen into the metal layer before subsequent processing steps, ensuring optimal interface quality is established early in the manufacturing process, which simplifies later steps and reduces overall process complexity

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design effectively lowers the contact resistance and Schottky barrier height, enhancing signal propagation speed and reducing power consumption while maintaining uniform interface quality.

Implementation Method 1

A heat treatment is performed to diffuse oxygen included in the second insulating layer to the metal layer so that the oxygen of the second insulating layer is accommodated in a region of the metal layer adjacent to the first insulating layer

Methodology Applied
Scientific EffectDiffusion: Diffusion

Data Source

PatentUS9653462B2Semiconductor device and method for fabricating the same
Publication Date: 2017.05.16 SAMSUNG ELECTRONICS CO LTD
  • US9653462B2 patent drawing
  • US9653462B2 patent drawing
  • US9653462B2 patent drawing

AI summary

A semiconductor device includes a fin type active pattern extended in a first direction and disposed on a substrate. A first gate electrode and a second gate electrode are disposed on the fin type active pattern. The first gate electrode and the second gate electrode are extended in a second direction crossing the first direction. A trench region is disposed in the fin type active pattern and between the first gate electrode and the second gate electrode. A source/drain region is disposed on a surface of the trench region. A source/drain contact is disposed on the source/drain region. The source/drain contact includes a first insulating layer disposed on the source/drain region and a metal oxide layer disposed on the first insulating layer.