FinFET Gate Contact Structure With Active-Region Overlap

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Solution Overview

Problem

The continuous reduction in gate length of field-effect transistors leads to increased gate resistance, which deteriorates high-frequency performance and complicates the design of high-frequency circuits, particularly in three-dimensional FinFET structures.

Innovation Solution

A field-effect transistor structure with a metal gate and etching-stop layers is implemented, where the etching-stop layer is overlaid on the metal trenches for source and drain, allowing for an extended gate contact that matches the shape of the metal gate, thereby increasing the contact area and reducing gate resistance. Additionally, a metal belt is placed above the gate contact to further reduce equivalent resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the gate length is continuously reduced to achieve higher integration, then the device size is reduced, but the gate resistance increases sharply

Engineering Contradiction:
Improvedevice sizeVSAvoidgate resistance
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The gate contact is extended into the active region along the width direction of the metal gate, transitioning from a conventional contact configuration to one that utilizes the width dimension. This dimensional extension increases the contact area between the gate contact and metal gate, thereby reducing gate resistance without increasing the gate length

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The gate contact is merged with the active region by extending it into the active region, allowing the gate contact to overlap with both the metal gate and the active region. This merging creates a larger effective contact area that reduces gate resistance while maintaining device miniaturization

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If the gate contact is extended into the active region to reduce gate resistance, then the contact area increases, but the risk of short-circuiting the metal trenches for source or drain increases

Engineering Contradiction:
Improvegate resistanceVSAvoidshort-circuit risk
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The etching-stop layer is selectively applied only on the metal trenches for source and drain, creating a local protective barrier. This localized treatment allows the gate contact to extend into the active region while preventing short-circuiting at the critical trench locations, enabling both reduced gate resistance and maintained device reliability

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The etching-stop layer serves as an intermediary protective layer between the gate contact and the metal trenches for source and drain. During the etching process to form the gate contact, this intermediate layer prevents the etching solution from reaching and short-circuiting the metal trenches, while allowing the gate contact to be formed extending into the active region

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12148834B2FinFET structure having a gate contact above a metal gate and straddling the boundary of an active region
Publication Date: 2024.11.19 HUAWEI TECH CO LTD
  • US12148834B2 patent drawing
  • US12148834B2 patent drawing
  • US12148834B2 patent drawing

AI summary

A field-effect transistor structure includes a semiconductor substrate, a metal gate, a metal trench for source, a metal trench for drain, an etching-stop layer, and a gate contact. The etching-stop layer is overlaid on the metal trench for source and the metal trench for drain. The gate contact is above an active region.