FinFET Air-Gap Spacer Structure With Self-Aligned Gate Isolation
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Solution Overview
Problem
The fabrication of FinFET devices faces challenges in forming air-gap spacers with minimal gate height loss and self-aligned positioning, while maintaining electrical isolation and compatibility with replacement gate processes.
Innovation Solution
The formation of air-gap spacers is integrated with a replacement gate process, where disposable spacers are etched back to form trenches between the gate structure and interlayer dielectric, then sealed with a sealing spacer, reducing gate height loss and allowing self-aligned positioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional air-gap spacer formation methods are used, then electrical isolation is achieved, but significant gate height loss occurs
Solution Approach 1:
A placeholder spacer is formed on the gate structure sidewall before the air-gap spacer formation process. This placeholder spacer serves as a protective element that prevents gate height loss during subsequent etching and spacer removal operations, while still allowing the air-gap spacer to provide the necessary electrical isolation function
2Reliability
If air-gap spacers are formed using conventional processes, then electrical isolation is provided, but self-aligned positioning is difficult to achieve
Solution Approach 1:
The placeholder spacer is formed to extend beyond the gate structure sidewall, creating an overhang that automatically defines the positioning of the air-gap spacer. During the etching process, this overhanging placeholder spacer serves as a self-aligned mask, ensuring the air-gap spacer is precisely positioned relative to the gate structure without requiring additional alignment steps
3Ease of manufacture
If disposable spacers are removed to form trenches, then air-gap spacer formation is enabled, but gate height loss increases
Solution Approach 1:
The placeholder spacer is selectively removed from specific regions where air-gap spacers are to be formed, creating trenches only in those locations. The placeholder spacer remains intact in other regions, continuing to protect the gate structure from height loss during subsequent processing steps
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes a fin protruding from a semiconductor substrate and a gate structure formed across the fin. The semiconductor device also includes a gate spacer formed over a sidewall of the gate structure. The gate spacer includes a sidewall spacer and a sealing spacer formed above the sidewall spacer. In addition, an air gap is vertically sandwiched between the sidewall spacer and the sealing spacer. The semiconductor device further includes a hard mask formed over the gate structure and covering a sidewall of the sealing spacer.