FinFET Alternative Channel Material Integration
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Solution Overview
Problem
The existing methods for forming FinFET devices with alternative channel materials are not reliable or repeatable, limiting the ability to efficiently address short channel effects and improve device performance as device dimensions decrease.
Innovation Solution
A method involving the formation of a patterned hard mask layer, multiple etching processes to define trenches and cavities, and the use of epitaxial deposition to create fins with alternative semiconducting materials, allowing for the integration of different materials within the fin structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the channel length of FETs is significantly decreased to improve switching speed, then the operating speed of FETs is improved, but the separation between source and drain regions is reduced making it difficult to inhibit short channel effects
Solution Approach 1:
The patent transitions from planar FET structure to FinFET structure, moving the channel from a 2D planar configuration to a 3D vertical fin structure. This dimensional change allows the channel to extend vertically while maintaining a short horizontal length, improving switching speed while the vertical structure provides better gate control over the channel to mitigate short channel effects
Solution Approach 2:
The patent employs alternative channel materials such as III-V materials (e.g., InGaAs) instead of traditional silicon, creating a composite material system. These materials provide superior electron mobility for faster switching while allowing better control of carrier concentrations to reduce short channel effects like drain-induced barrier lowering
2Adaptability or versatility
If blanket epitaxial deposition of alternative materials is performed followed by etching to define fins, then alternative channel materials can be used, but the process does not achieve widespread adoption due to reliability and repeatability issues
Solution Approach 1:
The patent performs preliminary patterning of the hard mask layer before epitaxial deposition, defining the exact fin locations and dimensions in advance. This preliminary action guides the subsequent selective epitaxial growth, ensuring that alternative materials are deposited only in predetermined locations with controlled thickness, improving process reliability and repeatability
Solution Approach 2:
The patent employs selective epitaxial growth where alternative materials are deposited only in specific localized regions (fin structures) rather than blanket deposition. This local quality approach allows different materials to be grown in different locations with different thicknesses, enabling precise control over channel properties while maintaining process reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the reliable and repeatable formation of FinFET devices with alternative channel materials, reducing short channel effects and enhancing device performance by allowing for the use of materials like silicon germanium or III-V materials, thereby improving switching speed and density.
Implementation Method 1
performing a first etching process through the patterned hard mask layer to define a plurality of spaced-apart trenches
Implementation Method 2
performing an epitaxial deposition process to blanket-deposit a III-V material on a silicon semiconducting substrate
Data Source
AI summary
One illustrative method disclosed herein involves performing a first etching process through a patterned hard mask layer to define a plurality of spaced-apart trenches in a substrate that defines a first portion of a fin for the device, forming a layer of insulating material in the trenches and performing a planarization process on the layer of insulating material to expose the patterned hard, performing a second etching process to remove the hard mask layer and to define a cavity within the layer of insulating material, forming a second portion of the fin within the cavity, wherein the second portion of the fin is comprised of a semiconducting material that is different than the substrate, and performing a third etching process on the layer of insulating material such that an upper surface of the insulating material is below an upper surface of the second portion of the fin.