FinFET Attribute Co-Optimization on Shared Semiconductor Substrates
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Solution Overview
Problem
Forming different types of electronic devices on the same semiconductor substrate with optimal transistor attributes is challenging, as it often results in sub-optimal performance due to conflicting requirements for parameters like fin height, source-drain profile, and contact width, leading to decreased performance or increased resistance.
Innovation Solution
The approach involves co-optimizing fin height, shallow source-drain profile, and source/drain contact width for different types of electronic devices on the same substrate through advanced semiconductor manufacturing processes like etching, lithography, and masking, allowing for the formation of finFETs with varying attributes to enhance performance parameters such as power efficiency and drive current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If different types of electronic devices are formed on the same semiconductor substrate with uniform transistor attributes, then manufacturing process is simplified, but performance of individual device types becomes sub-optimal
Solution Approach 1:
The patent applies local quality by forming different fin height structures in different regions of the semiconductor substrate. First fin structures are formed with a first fin height, then second fin structures are formed with a second fin height that is greater than the first fin height. This allows transistors in different device regions to have locally optimized attributes tailored to specific device type requirements while using a unified manufacturing process flow.
2Power
If fin height is increased to improve drive current, then power efficiency and drive current are enhanced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the fin structure formation into distinct stages: first fin structures are formed to a first height, then additional material is deposited and etched to form second fin structures with a greater second height. This segmentation allows independent optimization of fin heights for different device regions without requiring complete process redesign, thereby managing manufacturing complexity while achieving enhanced drive current through taller fins where needed.
Solution Approach 2:
The patent introduces vertical dimensionality variation by creating multiple fin height levels (first fin height and second fin height) within the same substrate. This dimensional approach allows drive current optimization through increased fin height in specific regions without affecting other device regions, resolving the conflict between performance enhancement and manufacturing complexity.
3Quantity of substance
If contact width is reduced to improve device density, then transistor density increases, but resistance increases
Solution Approach 1:
The patent applies local quality by forming source and drain contacts with different widths for different device types. First source and drain contacts are formed with a first width, then second source and drain contacts are formed with a second width that is greater than the first width. This allows high-density regions to maintain small contact widths while high-current regions receive enlarged contacts to reduce resistance, optimizing both density and electrical performance locally.
Data Source
AI summary
Transistors of different types of electronic devices on the same semiconductor substrate are configured with different transistor attributes to increase the performance of the different types of electronic devices. Fin height, shallow source drain (SSD) height, source or drain width, and/or one or more other transistor attributes may be co-optimized for the different types of electronic devices by various semiconductor manufacturing processes such as etching, lithography, process loading, and/or masking, among other examples. This enables the performance of a plurality of types of electronic devices on the same semiconductor substrate to be increased.