FinFET Fin Structure With Cap Layer for Width Integrity

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Solution Overview

Problem

Existing FinFET devices face challenges in precisely controlling the width of the fin structure during fabrication, leading to potential mechanical integrity issues and carrier mobility degradation due to the consumption of the fin structure during the formation of the gate dielectric layer.

Innovation Solution

A cap layer is selectively grown over the fin structure before forming the gate dielectric layer, ensuring the fin structure is not consumed and maintaining mechanical integrity, while a trimming process may be applied to enhance device performance by adjusting the fin width and reducing by-products.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the gate dielectric layer is formed by consuming the fin structure, then the gate dielectric layer can be formed in direct contact with the fin structure, but the fin structure width cannot be precisely controlled and mechanical integrity deteriorates

Engineering Contradiction:
Improvefin structure width controlVSAvoidmechanical integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

A cap layer is grown over the fin structure before forming the gate dielectric layer. This preliminary action protects the fin structure from being consumed during the gate dielectric formation process, maintaining both the fin width precision and mechanical integrity while still allowing the gate dielectric to be formed in direct contact with the fin structure through the cap layer interface

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cap layer serves as an intermediary between the fin structure and the gate dielectric layer. It enables the gate dielectric to be formed in contact with the fin structure while preventing direct consumption of the fin structure material, thus resolving the contradiction between achieving direct contact and maintaining structural integrity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If the fin structure is consumed during gate dielectric formation, then the gate dielectric can be formed directly on the fin structure, but carrier mobility degrades

Engineering Contradiction:
Improvegate dielectric formationVSAvoidcarrier mobility
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The cap layer is grown in advance over the fin structure before the gate dielectric formation process. This preliminary protective layer prevents the consumption of fin structure material that would otherwise occur during gate dielectric formation, thereby maintaining carrier mobility while still enabling direct contact formation between the gate dielectric and fin structure

Inventive Principle:
Principle #10Preliminary action

3Productivity

If no trimming process is applied, then the fabrication process is simpler, but by-products remain and device performance is reduced

Engineering Contradiction:
Improvefabrication process efficiencyVSAvoiddevice performance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A trimming process is applied to remove by-products formed during the cap layer growth and gate dielectric formation processes. This extraction of unwanted material improves device performance and reliability while maintaining the efficiency of the overall fabrication process by preventing defects that would require rework

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method prevents mechanical integrity issues and carrier mobility degradation by maintaining the fin structure's integrity during gate dielectric formation and enhances device performance through precise control of the fin width and removal of by-products.

Implementation Method 1

depositing a silicon cap layer over the fin structure

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

growing an oxide layer over the silicon cap layer

Methodology Applied
Scientific EffectOxidation: Oxidation

Data Source

PatentUS12191378B2Fin field effect transistor device structure
Publication Date: 2025.01.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12191378B2 patent drawing
  • US12191378B2 patent drawing
  • US12191378B2 patent drawing

AI summary

A fin field effect transistor device structure includes a fin structure formed over a substrate. The structure also includes a liner layer and an isolation structure surrounding the fin structure. The structure also includes a gate dielectric layer formed over the fin structure and the isolation structure. The structure also includes a gate structure formed over the gate dielectric layer. The structure also includes source/drain epitaxial structures formed on opposite sides of the gate structure. The fin structure includes a protruding portion laterally extending over the liner layer.