FinFET Channel Epitaxy With Low-Oxygen Interface Control
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Solution Overview
Problem
The challenge in semiconductor manufacturing is the formation of defects and high oxygen concentration at the top surface of substrates during the ion implantation process, which affects the quality of epitaxial layers and transistor performance.
Innovation Solution
A surface treatment process involving a wet clean, dry etching, and baking steps is employed to reduce defects and oxygen concentration, followed by the formation of an epitaxial layer on the substrate, which includes a patterned mask layer and trenches to create semiconductor fins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion implantation is performed on the substrate, then dopant regions are formed for transistor operation, but defects and high oxygen concentration are generated at the top surface
Solution Approach 1:
A surface treatment process comprising wet clean, dry etching, and baking steps is performed on the substrate top surface before epitaxial layer formation. This preliminary treatment removes defects and reduces oxygen concentration at the top surface, preventing these harmful factors from affecting the quality of the subsequently formed epitaxial layer and the performance of FinFET transistors.
2Manufacturing precision
If epitaxial layer is formed on the substrate, then high-quality semiconductor fins are created, but defects and high oxygen concentration from prior processes degrade the epitaxial layer quality
Solution Approach 1:
The surface treatment process is performed as a preliminary step before epitaxial layer formation to eliminate defects and reduce oxygen concentration at the substrate top surface. This ensures that the epitaxial layer grows on a clean, defect-free surface, achieving high manufacturing precision and quality FinFET structures.
Solution Approach 2:
The baking step in the surface treatment process, which initially might seem to introduce thermal stress, actually serves to reduce oxygen concentration and remove defects at the top surface. By controlling the baking conditions, the process converts potential thermal damage into a beneficial reduction of harmful oxygen and defects, improving epitaxial layer quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process results in high-quality epitaxial layers with reduced defects, enhancing the integrity and performance of FinFET transistors by minimizing crystal defects and improving electrical and optical properties.
Implementation Method 1
A surface treatment process involving a wet clean, dry etching, and baking steps is employed to reduce defects and oxygen concentration
Implementation Method 2
A surface treatment process involving a wet clean, dry etching, and baking steps is employed to reduce defects and oxygen concentration
Implementation Method 3
A surface treatment process involving a wet clean, dry etching, and baking steps is employed to reduce defects and oxygen concentration
Implementation Method 4
followed by the formation of an epitaxial layer on the substrate
Data Source
AI summary
A device includes a channel structure, a gate structure, a first source/drain structure, and a second source/drain structure. The channel structure protrudes from a substrate. The channel structure includes a top portion and a bottom portion between the top portion and the substrate. A composition of the bottom portion is different from a composition of the top portion, and an interface between the bottom portion and the top portion comprises oxygen and has an oxygen concentration lower than about 1.E+19 atoms/cm3. The gate structure is over the channel structure. The first source/drain structure and the second source/drain structure are on opposite sides of the gate structure and the top portion of the channel structure. The first source/drain structure comprises a first layer adjacent a sidewall of the top portion of the channel structure and a second layer away from the sidewall of the channel structure.