FinFET Crystalline Orientation for Balanced Mobility
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Solution Overview
Problem
Conventional planar channel transistors suffer from reduced control over carrier channels due to the 'short channel effect' as device sizes decrease, and non-planar FinFETs require different crystal orientations for PMOS and NMOS, leading to increased layout area and lithography complexities.
Innovation Solution
A field effect transistor with a carrier channel having a crystalline orientation where hole mobility and electron mobility are substantially the same, achieved by a semiconductor substrate with a protrusion or fin structure featuring inclined surfaces with specific crystal orientations, allowing for balanced PMOS and NMOS operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If different crystal orientations are used for PMOS and NMOS FinFETs, then mobility performance is improved, but layout area and lithography complexity increase
Solution Approach 1:
The patent changes the crystal orientation parameter from conventional (100) or (110) to (551) orientation, which provides substantially equal hole and electron mobility. This parameter change allows both PMOS and NMOS devices to use the same crystal orientation, resolving the contradiction between mobility performance and layout area by eliminating the need for different orientations.
Solution Approach 2:
The (551) crystal orientation serves a universal function for both PMOS and NMOS devices, providing balanced mobility performance for both carrier types. This universality eliminates the need for separate optimization paths for different device types, reducing layout complexity and area while maintaining high mobility performance for both PMOS and NMOS FinFETs.
2Reliability
If different crystal orientations are used for PMOS and NMOS FinFETs, then mobility performance is improved, but lithography difficulty increases
Solution Approach 1:
By changing the crystal orientation parameter to (551), the patent enables both PMOS and NMOS devices to be fabricated using the same lithography processes and alignment procedures. This eliminates the need for complex mixed-rotation lithography, significantly reducing lithography difficulty while maintaining equal mobility performance for both device types.
3Length of moving object
If planar channel transistor size is reduced, then device scaling is achieved, but short channel effect worsens
Solution Approach 1:
The patent transitions from planar channel geometry to FinFET geometry, adding a vertical dimension to the channel structure. This dimensional change provides better gate control over the carrier channel, suppressing short channel effects even at reduced channel lengths. The (551) orientation further enhances this control by providing balanced mobility characteristics.
Data Source
AI summary
A field effect transistor includes a semiconductor substrate having a protrusion with at least one inclined surface, a gate insulator disposed at least on a portion of the inclined surface, and a gate conductor disposed on the gate insulator, wherein the semiconductor substrate comprises doped regions sandwiching a channel region, wherein the at least one inclined surface has a first crystal orientation in the channel region, and the inclined surface has an included angle to a vertical plane with a second crystal orientation. The hole mobility and the electron mobility are substantially the same in the channel region having a crystalline orientation off from the (110) crystal orientation.


