FinFET Dummy Polysilicon Resistor Layout for Compact ESD Circuits
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Solution Overview
Problem
The increasing size of resistors in semiconductor chips, particularly in high resistance functional circuits like ESD and filter circuits, occupies a significant chip area, leading to higher manufacturing costs and reduced integration density.
Innovation Solution
The use of dummy polycrystalline silicon as a resistor in FinFETs and planar FETs, where the dummy polycrystalline silicon is strategically placed to reduce the area occupied by resistors, allowing for series connections to achieve high resistance requirements while minimizing chip space and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional resistors are used in high resistance functional circuits (ESD, filter), then the required resistance performance is achieved, but the chip area occupied becomes extremely large
Solution Approach 1:
The patent merges the resistor function with the dummy polycrystalline silicon structure that already exists in the FinFET device. Instead of adding a separate resistor component, the dummy polycrystalline silicon is configured to serve dual purposes: maintaining device performance and providing the required resistance function, thereby eliminating additional area occupation
Solution Approach 2:
The dummy polycrystalline silicon, which would otherwise be a non-functional structure, is transformed into a multi-functional element that simultaneously serves as a structural component of the FinFET and as a functional resistor for ESD protection and filter circuits, achieving one component performing multiple functions
2Adaptability or versatility
If multiple high resistance functional circuits are integrated in a full chip, then the circuit functionality is improved, but the total chip area becomes very considerable
Solution Approach 1:
The patent applies the merged resistor-FinFET structure across multiple functional circuits on the chip. Each circuit utilizes its own dummy polycrystalline silicon as an integrated resistor, eliminating the need for separate resistor areas and enabling high-density integration of multiple high resistance circuits
3Reliability
If large area resistors are used to meet high resistance requirements, then the resistance performance is achieved, but the manufacturing costs become increasingly high
Solution Approach 1:
The dummy polycrystalline silicon structure serves itself by providing both structural support for the FinFET and the resistance function simultaneously. This self-service approach eliminates the need for additional manufacturing steps and materials dedicated solely to creating resistors, thereby reducing manufacturing costs
Data Source
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AI summary
A fin field-effect transistor, an ESD protection circuit, a filter circuit, and an electronic device are disclosed. The fin field-effect transistor (FinFET) includes one or more fins arranged in parallel, a plurality of valid gates (G1, G2, and G3), and first dummy polycrystalline silicon (P1). The one or more fins all extend in a first direction, and the plurality of valid gates (G1, G2, and G3) and the first dummy polycrystalline silicon (P1) all extend in a second direction and cover surfaces of the one or more fins (Fin) arranged in parallel. The first dummy polycrystalline silicon (P1) is located on one side of the plurality of valid gates (G1, G2, and G3), and fins on both sides of each of the plurality of valid gates (G1, G2, and G3) are respectively a source terminal and a drain terminal of the FinFET. The plurality of valid gates (G1, G2, and G3) are coupled to a gate terminal of the FinFET. The first dummy polycrystalline silicon (P1) is coupled between the gate terminal of the FinFET and a resistor potential terminal. In the foregoing FinFET, the dummy polycrystalline silicon is fully used, and the dummy polycrystalline silicon is used as a resistor, so that an area occupied by the resistor is reduced, and a chip is further miniaturized.