FinFET Source/Drain Epitaxy Sequencing for Selective-Loss Defects

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Solution Overview

Problem

The formation of Fin Field-Effect Transistors (FinFETs) faces challenges with selective loss defects, where the epitaxy process leads to adverse growth of source/drain material on dielectric material due to loss of selectivity, making it difficult to remove p-type selective-loss defects effectively compared to n-type defects.

Innovation Solution

The approach involves forming n-type source/drain regions before p-type regions, allowing for easier removal of n-type selective-loss defects during the p-type epitaxy process by utilizing appropriate process gases, thereby minimizing selective-loss defects through a controlled epitaxy process flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the epitaxy process is performed to grow source/drain regions, then the source/drain regions are formed, but selective loss defects occur where source/drain material grows on dielectric material due to loss of selectivity

Engineering Contradiction:
Improveselectivity of epitaxy processVSAvoidselective loss defects
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary action by forming a mandrel structure with specific geometry (narrower top width than bottom width) before the epitaxy process. This pre-formed structure controls the epitaxial growth direction and prevents lateral overgrowth onto dielectric regions, thereby preventing selective loss defects before they occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a mandrel structure as an intermediary element between the gate structure and the source/drain regions. This mandrel acts as a physical barrier and growth template that mediates the epitaxy process, ensuring material grows only in the intended semiconductor regions and not on dielectric material.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If p-type source/drain regions are formed separately from n-type regions, then different materials can be used for each, but the process complexity increases and defect removal becomes more difficult

Engineering Contradiction:
Improvematerial selection flexibilityVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges the formation processes of n-type and p-type source/drain regions into a single integrated process flow. Both regions are formed simultaneously using the same mandrel-based epitaxy approach, allowing different materials to be deposited in different regions while following a unified process sequence, thereby reducing overall process complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies local quality by enabling different materials to be deposited in different regions (n-type vs p-type) while using the same overall process methodology. The mandrel structure allows localized material deposition with different compositions tailored to specific device regions, maintaining material flexibility without proportionally increasing process complexity.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If n-type source/drain regions are formed before p-type regions, then n-type selective loss defects can be easily removed during p-type epitaxy, but the process sequence must be carefully controlled

Engineering Contradiction:
Improvedefect removal easeVSAvoidprocess efficiency
Core Design Contradiction:
Ease of manufactureVSProductivity

Solution Approach 1:

The patent converts the potential harm of n-type selective loss defects into a benefit by designing the process sequence where these defects are automatically removed during the subsequent p-type epitaxy process. The p-type epitaxy conditions serve to eliminate n-type defects, turning a manufacturing challenge into a self-correcting process feature.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements preliminary action by forming n-type source/drain regions first, with the understanding that any selective loss defects will be removed in the next step. This deliberate sequencing allows defects to be introduced and then eliminated in a controlled manner, improving overall manufacturing ease.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method reduces the occurrence and ease of removal of selective-loss defects, improving the overall process efficiency and reducing defects in FinFETs by prioritizing n-type epitaxy formation before p-type, leveraging the availability of effective process gases for n-type defect removal.

Implementation Method 1

performing an epitaxy process to grow epitaxy regions from the recesses

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS12154974B2Source/drain formation with reduced selective loss defects
Publication Date: 2024.11.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12154974B2 patent drawing
  • US12154974B2 patent drawing
  • US12154974B2 patent drawing

AI summary

A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.