FinFET ESD Protection Structure with Nested SCR Doping

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Solution Overview

Problem

Conventional ESD protection structures for semiconductor devices using FinFET technology are space-occupying, hindering the miniaturization of semiconductor devices, as they are not integrated into the fin structure.

Innovation Solution

A semiconductor structure incorporating a p-n-p-n silicon-controlled rectifier (SCR) configuration with specific doping regions and fins, which reduces the necessary area for ESD protection while maintaining high holding and trigger voltages, allowing for a compact layout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional ESD protection structure is used, then ESD protection function is provided, but the device area increases

Engineering Contradiction:
ImproveESD protection functionVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the ESD protection structure with the FinFET device structure by integrating the ESD protection doped regions directly into the fin structure. The first and second doped regions are formed within the fin, while the third and fourth doped regions are formed in the substrate, creating a unified structure that provides both device functionality and ESD protection without requiring separate dedicated ESD protection area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ESD protection structure is nested within the FinFET device structure. The ESD protection doped regions are embedded within the fin and substrate, with the first and second doped regions nested in the fin and the third and fourth doped regions nested in the substrate, creating a compact nested configuration that maximizes space utilization.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If the ESD protection structure is integrated into the fin structure, then device area is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice areaVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The ESD protection structure is segmented into four distinct doped regions (first, second, third, and fourth doped regions) with different positions and functions. The first and second doped regions are segmented within the fin, while the third and fourth doped regions are segmented in the substrate, allowing for systematic manufacturing and control of each region's doping parameters.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different doped regions are assigned different local qualities with specific doping types and concentrations tailored to their respective functions. The first and second doped regions have doping types opposite to the fin's channel, while the third and fourth doped regions have doping types opposite to the substrate's well, creating locally optimized doping profiles that enhance ESD protection while maintaining device performance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed semiconductor structure effectively provides ESD protection with a reduced footprint, achieving high holding and trigger voltages, and can be designed for bi-directional operation, thus supporting the miniaturization of semiconductor devices.

Implementation Method 1

The first doping region is disposed under the first fin. The first doping region separates the first fin from the first well. The first doping region has the second doping type.

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS9466598B1Semiconductor structure suitable for electrostatic discharge protection application
Publication Date: 2016.10.11 UNITED MICROELECTRONICS CORP
  • US9466598B1 patent drawing
  • US9466598B1 patent drawing
  • US9466598B1 patent drawing

AI summary

A semiconductor structure suitable for ESD protection application is provided. The semiconductor structure includes a first well, a second well, a third well, a first fin, a second fin, an anode, a cathode and a first doping region. The first well and the second well are disposed in the third well. The first fin is disposed on the first well. The second fin is disposed on the second well. The anode is disposed on the first fin. The cathode is disposed on the second fin. The first doping region is disposed under the first fin, and separates the first fin from the first well. The first well, the second well, the first fin and the second fin have a first doping type. The third well and the first doping region have a second doping type.