FinFET Gate Formation via Carbon Mold Combustion
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Solution Overview
Problem
Fin field-effect transistors (finFETs) face issues with gate shorting due to angled sidewalls and non-anisotropic etch processes, leading to reduced yields and a narrower process window, as the conformal film thickens in gaps between adjacent fins, causing conductive residue and shorts between transistors.
Innovation Solution
A manufacturing process involving the formation of gates in insulated caverns created by a carbon mold, where the mold is combusted to remove the carbon, allowing for the filling of cavities with gate insulator and conductive material, thereby reducing the likelihood of gate shorts and improving yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conformal film is deposited on angled sidewalls of fins, then the film thickness increases in the gaps between adjacent fins, but this causes conductive residue to form and short adjacent finFETs
Solution Approach 1:
A sacrificial oxide layer is deposited as an intermediary material between the fin sidewalls and the conformal gate film. This oxide layer fills the gaps between adjacent fins and prevents the conformal film from making contact across the gap, thereby eliminating the shorting path while still allowing the gate to be formed conformally on the fin sidewalls.
Solution Approach 2:
The sacrificial oxide layer is deposited in advance before the conformal gate film formation. This preliminary action creates a protective barrier that prevents the harmful effect (conductive residue formation) from occurring in the first place, rather than attempting to remove or correct the problem after it arises.
2Length of moving object
If photolithography is used to pattern gates, then alignment and resolution constraints limit the achievable gate dimensions, but alternative methods are needed to form narrower gates
Solution Approach 1:
The mechanical photolithography patterning process is replaced with a self-aligned conformal deposition and anisotropic etch process. Instead of using light patterns and mechanical alignment, the gate structure is formed by depositing conformal films that automatically align to the fin geometry and using directional etching to define the gate width, achieving narrower and more precise gate dimensions.
3Length of moving object
If the sidewall-spacer process is used to form gates, then narrower gates can be formed, but angled sidewalls narrow the process window and cause film thickening in gaps
Solution Approach 1:
The sidewall angle parameter is changed from angled to substantially vertical by modifying the fin formation etch process to be more anisotropic. This parameter change expands the process window for subsequent conformal film deposition, preventing film thickening in gaps and eliminating the associated shorting problems while maintaining narrow gate dimensions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This process effectively prevents gate shorts and enhances the manufacturing yield by forming insulated gates that are less likely to short to adjacent transistors, improving the reliability and performance of finFETs.
Implementation Method 1
removing the carbon mold from under the insulator by combusting the mold
Data Source
AI summary
Disclosed are methods, systems and devices, including a method that includes the acts of forming a semiconductor fin, forming a sacrificial material adjacent the semiconductor fin, covering the sacrificial material with a dielectric material, forming a cavity by removing the sacrificial material from under the dielectric material, and forming a gate in the cavity.