FinFET Metal Gate Cut Sequencing for Uniform Gate Fill
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Solution Overview
Problem
The semiconductor industry faces challenges in efficiently forming metal gates in FinFET devices, particularly in creating uniform and defect-free metal gate cuts, which can affect the integration density and performance of integrated circuits.
Innovation Solution
The method involves forming a dummy gate structure, replacing it with a metal gate, and then performing an etching process to create a recess in the metal gate and dielectric material, allowing for the deposition of a second dielectric material within these recesses, thereby improving the uniformity and efficiency of the metal gate deposition process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If metal gate cut is formed before metal gate replacement, then narrow regions are created that cause deposition challenges, but the process sequence becomes more complex and affects integration density
Solution Approach 1:
The metal gate cut is formed after the metal gate replacement rather than before, allowing the metal gate to be deposited uniformly across the entire fin structure first. This preliminary completion of the metal gate deposition avoids the deposition challenges caused by narrow regions, while the cut is subsequently formed through controlled etching processes.
2Productivity
If metal gate cut is formed early in the process, then subsequent deposition steps face challenges in narrow regions, but the overall process time increases
Solution Approach 1:
The metal gate is fully deposited before forming the metal gate cut, ensuring uniform deposition across all regions including areas that would later become narrow regions. This preliminary action guarantees manufacturing precision while maintaining process efficiency by avoiding rework or additional deposition steps.
Solution Approach 2:
The process is segmented into distinct stages: first completing the metal gate deposition across the entire structure, then separately forming the metal gate cut through etching. This segmentation allows each step to be optimized independently, ensuring both precision and efficiency.
3Manufacturing precision
If dummy gate structure is replaced with metal gate before forming metal gate cut, then deposition uniformity improves, but the process steps increase
Solution Approach 1:
The dummy gate structure is replaced with the metal gate before the metal gate cut is formed, allowing the metal gate to be deposited uniformly across the entire fin structure. Although this adds a process step, it eliminates deposition challenges and ensures manufacturing precision, with the additional step being a simple etching operation rather than a complex deposition sequence.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity and filling efficiency of the metal gate deposition, reduces process defects, and improves the performance of FinFET devices by forming the metal gate cut after the metal gate replacement, addressing issues of narrow regions and subsequent deposition challenges.
Implementation Method 1
performing an etching process to form a recess in the metal gate and in the first dielectric material
Implementation Method 2
depositing a second dielectric material within the recesses
Data Source
AI summary
A method includes forming a first semiconductor fin and a second semiconductor fin in a substrate, the first semiconductor fin adjacent the second semiconductor fin, forming a dummy gate structure extending over the first semiconductor fin and the second semiconductor fin, depositing a first dielectric material surrounding the dummy gate structure, replacing the dummy gate structure with a first metal gate structure, performing an etching process on the first metal gate structure and on the first dielectric material to form a first recess in the first metal gate structure and a second recess in the first dielectric material, wherein the first recess extends into the substrate, and wherein the second recess is disposed between the first semiconductor fin and the second semiconductor fin, and depositing a second dielectric material within the first recess.