FinFET Gate Cut Dielectric Undercut for Metal Gate Integration
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Solution Overview
Problem
In advanced FinFET manufacturing, the proximity of the backfilled layer to an adjacent fin results in insufficient space for the deposition of a complete functional gate structure due to the proximity of the sacrificial gate layer, making it challenging to form a functional replacement metal gate without altering design rules or compromising real estate.
Innovation Solution
A gate cut scheme is employed that includes the deposition of mutually etch-selective dielectric layers within the gate cut opening, where partial removal of one dielectric layer creates an undercut region, increasing the gap between the remaining gate cut dielectric layer and the adjacent fin, allowing for the deposition of a functional gate stack without altering design rules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a sacrificial gate layer is deposited and backfilled in a standard gate-last process, then the sacrificial gate provides thermal protection during activation, but the backfilled layer is positioned too close to adjacent fins, leaving insufficient space for deposition of a complete functional gate structure
Solution Approach 1:
The gate cut dielectric layer is segmented into multiple sections along the channel length, with gate cut openings between them. This segmentation allows selective removal of dielectric material to create additional space for functional gate deposition while maintaining thermal protection in other regions.
Solution Approach 2:
The solution introduces vertical dimensionality by forming an undercut region where the gate cut dielectric layer is removed laterally to create a stepped structure. This vertical relief provides the necessary horizontal space for functional gate deposition without increasing the overall footprint.
2Area of moving object
If the gate cut opening is positioned close to adjacent fins to maintain design rules, then device density is improved, but there is insufficient space for complete functional gate structure deposition
Solution Approach 1:
The gate cut dielectric layer is deposited and patterned in advance, creating predefined openings and undercut regions before functional gate deposition. This preliminary structuring ensures that sufficient space is available for complete functional gate deposition while maintaining close proximity to fins for high device density.
3Device complexity
If the sacrificial gate layer is removed without forming an undercut region, then the process is simpler, but the backfilled layer remains too close to adjacent fins, preventing complete functional gate deposition
Solution Approach 1:
The gate cut dielectric layer serves as an intermediary structure that is selectively removed to create the undercut region. This intermediate step enables space creation for functional gate deposition while maintaining relative simplicity by using a dedicated dielectric material that can be selectively etched.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the formation of a functional replacement metal gate with increased space between the gate cut dielectric and the adjacent fin, facilitating the deposition of a complete gate stack while maintaining the original design rules, thereby enhancing device density and performance.
Implementation Method 1
an etching step laterally etches the first dielectric layer to form a gap adjacent to the first one of the fins
Implementation Method 2
A first dielectric layer is deposited into the gate cut opening such that a height of the first dielectric layer is greater than a height of the first one of the fins. A second dielectric layer is then deposited into the gate cut opening and over the first dielectric layer.
Data Source
AI summary
A method of manufacturing a FinFET structure involves forming a gate cut within a sacrificial gate layer and backfilling the gate cut opening with etch selective dielectric materials. Partial etching of one of the dielectric materials can be used to increase the distance between the gate cut (isolation) structure and an adjacent fin relative to methods that do not perform a backfilling step using etch selective materials.