FinFET Gate Structure for Floating Body Suppression in SOI
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Solution Overview
Problem
Semiconductor devices with fin-type transistors on silicon-on-insulator (SOI) substrates suffer from floating body effects, leading to characteristic variations such as threshold voltage fluctuations due to electric charge accumulation, and establishing electrical conduction between the channel and substrate to mitigate this effect compromises the advantages of the SOI structure.
Innovation Solution
A semiconductor device design with a fin structure that includes a channel layer connected to a substrate via a semiconductor layer, where a gate electrode partially contacts the semiconductor layer, allowing the channel to be electrically isolated or connected based on gate voltage, thereby maintaining the SOI advantages while reducing floating body effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If electrical conduction is made between the channel and substrate to eliminate the floating body effect, then the floating body effect is suppressed, but potential change in the channel region by gate voltage is reduced
Solution Approach 1:
The gate electrode is divided into two distinct portions: a first portion disposed over the channel layer and a second portion disposed between the substrate and channel layer. This segmentation allows independent optimization of each gate portion's function, enabling the second portion to provide substrate connection for floating body effect suppression while the first portion maintains gate control over the channel
Solution Approach 2:
A semiconductor layer is introduced as an intermediary component between the substrate and the channel layer. The gate electrode contacts this semiconductor layer, which acts as a mediator to establish electrical conduction paths while maintaining the SOI structure's advantages. This intermediary enables controlled electrical connection without direct substrate-channel contact that would compromise SOI benefits
2Ease of operation
If the channel is electrically isolated from the substrate to maintain SOI advantages, then the SOI structure benefits are preserved, but floating body effects occur due to charge accumulation
Solution Approach 1:
The electrical connection state between channel and substrate is made dynamic rather than fixed. By applying different gate voltages to the gate electrode portions, the system can switch between electrical isolation (maintaining SOI advantages) and electrical conduction (suppressing floating body effect), adapting to different operational requirements
Solution Approach 2:
The gate electrode is segmented into first and second portions that can independently control different aspects of channel-substrate interaction, allowing selective electrical connection to mitigate floating body effects while preserving SOI structure benefits during operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design suppresses floating body effects, maintains the advantages of the SOI structure, and enhances source-drain current density and reduces threshold voltage variations without increasing parasitic resistance.
Implementation Method 1
potential change in the channel region by a gate voltage may be reduced
Data Source
AI summary
A semiconductor device having a transistor with fin structure includes a substrate, a channel layer, a semiconductor layer, a source layer, a drain layer, and a gate electrode. The channel layer is disposed over the substrate and has a first side surface and a second side surface opposite to the first side surface. The semiconductor layer is disposed between the substrate and the channel layer. The source layer is disposed on the first side surface of the channel layer over the substrate. The drain layer is disposed on the second side surface of the channel layer over the substrate. The gate electrode includes a first portion disposed over the channel layer and a second portion disposed between the substrate and the channel layer. The gate electrode contacts the semiconductor layer.