FinFET Fin Structure with Atomic Layer Etching for Gate Wrapping
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Solution Overview
Problem
As semiconductor devices continue to scale down in size, existing manufacturing methods for FinFET devices face challenges in achieving precise control over the fin structure and gate wrapping, which affects electrical control and reduces current leakage and short-channel effects.
Innovation Solution
The manufacturing method involves forming fins on a substrate using photolithography and etching processes, followed by the deposition of insulators and the formation of a stack strip structure. An atomic layer etching process is then used to remove spacer material layers and oxide layers from the flank portions of the fins, allowing for the growth of epitaxy material portions that wrap around the fins and enhance carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography and etching processes are used to form fins, then the manufacturing process is simple and easy to implement, but the manufacturing precision and control over fin structure dimensions are insufficient
Solution Approach 1:
The manufacturing process is divided into multiple sequential steps: forming mandrels, depositing first spacers, forming second spacers, and performing atomic layer etching. Each step builds upon the previous one to progressively achieve the desired fin structure precision that cannot be obtained through conventional single-step photolithography and etching processes.
Solution Approach 2:
Mandrels are formed first as preliminary structures that guide the subsequent formation of spacers and fins. The first and second spacers are deposited in advance to define the fin dimensions before the actual fin formation occurs, ensuring precise dimensional control throughout the manufacturing process.
2Reliability
If the gate wraps around the fin to provide better electrical control, then current leakage and short-channel effects are reduced, but the manufacturing precision required to achieve proper gate wrapping increases
Solution Approach 1:
The atomic layer etching process selectively removes material from specific regions (sidewalls of fins and mandrels) while preserving other regions. This localized material removal enables precise formation of gate spacers and gate structure that wrap around the fins with high precision, achieving the necessary electrical control without requiring excessive manufacturing precision throughout the entire structure.
Solution Approach 2:
The first and second spacers act as intermediary structures that facilitate the formation of the gate wrapping structure. These spacers are deposited and patterned to create the necessary geometry for gate formation, serving as intermediate steps that enable precise gate wrapping without directly requiring high precision in the final gate structure fabrication.
3Manufacturing precision
If atomic layer etching is used to remove spacer material and oxide layers, then the manufacturing precision and fin structure control are improved, but the productivity and manufacturing time are reduced
Solution Approach 1:
Conventional mechanical or chemical etching processes are replaced with atomic layer etching, which uses sequential deposition and removal cycles at the atomic level. This substitution provides superior precision in fin structure control and gate spacer formation, achieving the necessary dimensional accuracy despite the increased process time and reduced throughput compared to conventional etching methods.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the precise formation of FinFET devices with improved electrical control, reduced current leakage, and enhanced performance by ensuring uniform stress and separate epitaxy material portions on each fin, suitable for small fin pitches and high-yield production.
Implementation Method 1
An atomic layer etching process is then used to remove spacer material layers and oxide layers from the flank portions of the fins
Implementation Method 2
forming fins on a substrate using photolithography and etching processes
Implementation Method 3
allowing for the growth of epitaxy material portions that wrap around the fins
Data Source
AI summary
A fin-type field effect transistor comprising a substrate, at least one gate stack and epitaxy material portions is described. The substrate has fins and insulators located between the fins, and the fins include channel portions and flank portions beside the channel portions. The at least one gate stack is disposed over the insulators and over the channel portions of the fins. The epitaxy material portions are disposed over the flank portions of the fins and at two opposite sides of the at least one gate stack. The epitaxy material portions disposed on the flank portions of the fins are separate from one another.