FinFET Grooved Fin Surface Area Saturation Current
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Solution Overview
Problem
Current FinFETs do not meet high power requirements due to limitations in saturation current and current density, necessitating an enhancement in these parameters for effective high power applications.
Innovation Solution
A method for fabricating FinFETs involves forming trenches and semiconductor fins with grooves on the top surface, followed by the deposition of insulators and a gate stack that partially covers the fin, groove, and insulators, increasing the surface area and enhancing electrical control, thereby increasing saturation current and current density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional planar FinFET structures are used, then manufacturing simplicity is maintained, but saturation current and current density are insufficient for high power applications
Solution Approach 1:
The patent introduces grooves on the top surface of the semiconductor fin, transforming the flat two-dimensional top surface into a three-dimensional structured surface. This dimensional change increases the effective surface area of the fin that interacts with the gate, thereby enhancing electrical control and increasing saturation current and current density without fundamentally changing the overall FinFET architecture
Solution Approach 2:
The top surface of the semiconductor fin is segmented into multiple regions by forming grooves, creating a multi-level structured surface. This segmentation increases the effective surface area and improves gate control over the channel, directly addressing the insufficient saturation current in conventional FinFETs
2Power
If the fin surface area is increased to improve current drive capability, then saturation current increases, but manufacturing precision requirements increase
Solution Approach 1:
The grooves are formed on the top surface of the semiconductor fin before the gate stack is formed. This preliminary action allows the gate dielectric and gate electrode to conformally cover the grooved surface, automatically adapting to the increased surface area without requiring additional alignment steps or complex manufacturing processes
Solution Approach 2:
The grooves introduce curved surfaces on the otherwise planar fin top surface. These curved surfaces increase the effective area for gate control while maintaining manufacturability through standard semiconductor fabrication techniques that can handle curved topographies
Data Source
AI summary
A FinFET including a substrate, a plurality of insulators and a gate stack is provided. The substrate comprises a plurality of trenches and at least one semiconductor fin between the trenches, wherein the semiconductor fin comprises at least one groove, and the at least one groove is located on a top surface of the semiconductor fin. The insulators are disposed in the trenches. The gate stack partially covers the semiconductor fin, the at least one groove and the insulators.


