FinFET Element Isolation Region Stacked Structure
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Solution Overview
Problem
The variation in the position of the top of the element isolation region during the manufacturing process of a MONOS memory cell in a fin field effect transistor (FINFET) leads to difficulties in processing the gate electrode and insufficient filling with an interlayer insulating film, affecting the reliability and yield of the semiconductor device.
Innovation Solution
The semiconductor device employs a stacked structure for the element isolation region around the fin, using a silicon oxide film and a silicon nitride film, with the silicon nitride film protecting the top of the element isolation region to prevent variations and ensure accurate positioning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single-layer element isolation region is used, then the manufacturing process is simple, but the position of the top of the element isolation region varies during processing and cleaning steps
Solution Approach 1:
The element isolation region is divided into multiple layers: a first element isolation region (silicon oxide film) and a second element isolation region (silicon nitride film). This segmentation allows each layer to perform specific functions - the silicon oxide provides isolation while the silicon nitride protects the top surface from position variation during processing and cleaning steps.
Solution Approach 2:
The element isolation region uses a composite structure combining silicon oxide and silicon nitride films. The silicon oxide film provides the base isolation function, while the silicon nitride film adds protective properties that prevent position variation. This composite material approach resolves the contradiction by combining materials with complementary properties.
2Manufacturing precision
If the element isolation region position varies, then processing of gate electrode becomes difficult, but using a stacked structure increases device complexity
Solution Approach 1:
By segmenting the element isolation region into functional layers (silicon oxide base layer and silicon nitride protective layer), the structure achieves position stability without excessive complexity. Each segment has a specific role that contributes to the overall precision goal.
Solution Approach 2:
The silicon nitride film is applied specifically to the top portion of the element isolation region where position stability is critical for gate electrode processing. This local application of enhanced protection maintains manufacturing precision while minimizing additional device complexity.
3Manufacturing precision
If the element isolation region position varies, then interlayer insulating film filling becomes insufficient, but stabilizing the position requires additional processing steps
Solution Approach 1:
The silicon nitride film is formed in advance on the silicon oxide film before subsequent processing steps. This preliminary protective layer prevents position variation from occurring during cleaning and processing, ensuring accurate positioning without requiring corrective steps later in the manufacturing process.
Data Source
AI summary
Variations in height of a top of an element isolation region, which is embedded in a trench surrounding the periphery of a fin having a channel region of a split-gate MONOS memory, are suppressed to improve reliability of a semiconductor device. An element isolation region embedded in a trench between a plurality of fins, which are part of a semiconductor substrate in a memory cell region and protrude above the semiconductor substrate, is comprised of an insulating film covering the bottom of the trench and a silicon nitride film covering the top of the insulating film.