FinFET Source/Drain Isotope Structure for Speed and Reliability
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Solution Overview
Problem
Existing integrated circuit (IC) devices face challenges in achieving high operating speed and accuracy while ensuring the performance and reliability of fin-type field-effect transistors (FETs) as they are scaled down and integrated at higher densities.
Innovation Solution
The IC device incorporates a fin-type active region with a specific silicon isotope composition in the source/drain regions, including a lower region with silicon isotopes 28Si, 29Si, and 30Si, and an upper region with a higher content of 28Si, integrated with a gate structure that enhances electrical connectivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the integration density of IC devices is increased and the sizes of IC devices are reduced, then the miniaturization and integration of circuits are achieved, but the performance and reliability of field-effect transistors deteriorate
Solution Approach 1:
The source/drain region is divided into two distinct zones with different silicon isotope compositions: a first zone containing silicon isotopes 28Si, 29Si, and 30Si, and a second zone containing predominantly 28Si. This local differentiation allows each zone to contribute different properties to the overall device performance, with the 28Si-enriched zone providing enhanced carrier mobility for improved FET reliability while maintaining high integration density
2Length of moving object
If the downscaling of IC devices progresses, then the size reduction is achieved, but the operating speed and operating accuracy deteriorate
Solution Approach 1:
By creating a spatial gradient in silicon isotope composition within the source/drain region, the patent achieves local optimization of carrier transport properties. The 28Si-enriched second zone specifically targets carrier mobility enhancement, enabling maintained operating speed despite overall device downscaling
3Length of moving object
If the downscaling of IC devices progresses, then the size reduction is achieved, but the operating accuracy deteriorates
Solution Approach 1:
The differentiated silicon isotope composition in the source/drain region creates localized zones with optimized electrical properties. The 28Si-enriched zone improves carrier mobility and reduces scattering effects, thereby maintaining precise electrical characteristics and operating accuracy even as device dimensions are reduced
Data Source
AI summary
An integrated circuit (IC) device includes a fin-type active region extending long in a first lateral direction on a substrate, a channel region on the fin-type active region, a gate line surrounding the channel region, and a source/drain region adjacent to the gate line on the fin-type active region, the source/drain region. The source/drain region includes a lower source/drain region and an upper source/drain region. The lower source/drain region includes at least one silicon isotope selected from silicon isotopes of 28Si, 29Si, and 30Si, and the upper source/drain region includes a 28Si element at a content higher than a content of the 28Si element in the lower source/drain region.