FinFET MTP Memory Cell With Nitride Storage and Metal Gate
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Solution Overview
Problem
Conventional embedded non-volatile memory (eNVM) technologies face challenges due to bottlenecks in thin oxide and metal gate processes during technology shrinking, which affect the efficiency and reliability of multi-time programmable (MTP) cells.
Innovation Solution
The development of a novel MTP memory cell utilizing a Fin field effect transistor (FinFET) with a silicon nitride storage gate and a metal-containing control gate, allowing for high-efficiency programming and erasing by selectively trapping electrons in the storage gate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional floating polycrystalline gate is used for charge storage in eNVM, then the structure is simple and manufacturing is easier, but the efficiency and reliability deteriorate during technology shrinking
Solution Approach 1:
The patent employs a composite gate structure combining silicon nitride (storage gate) and metal gate (control gate) materials. The silicon nitride layer provides reliable charge storage capability while the metal gate enables efficient control, together resolving the contradiction between manufacturing simplicity and reliability in scaled devices.
Solution Approach 2:
The patent applies different material properties to different regions of the gate structure: silicon nitride in the storage gate region for charge trapping and metal in the control gate region for electrical control. This local differentiation optimizes both reliability and manufacturability in the context of technology scaling.
2Length of moving object
If thin oxide and metal gate process is used during technology shrinking, then device scaling is achieved, but the bottleneck affects eNVM performance
Solution Approach 1:
The patent changes the material parameters of the gate structure by introducing silicon nitride and metal layers, which alters the electrical and storage characteristics to maintain programming and erasing efficiency despite device scaling and thin oxide constraints.
3Ease of manufacture
If conventional eNVM structure is used, then manufacturing process is established, but read current differentiation between programmed and erased states is insufficient
Solution Approach 1:
The composite gate structure of silicon nitride and metal creates distinct electrical states with enhanced read current differentiation. The metal control gate provides superior field control while silicon nitride offers reliable charge storage, together enabling clear distinction between programmed and erased states while maintaining compatibility with established manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables reliable and efficient multi-time programming and erasing of the MTP cell, with improved read current differentiation between programmed and erased states, thus addressing the limitations of conventional eNVM technologies.
Implementation Method 1
a storage gate electrode layer disposed on the first gate dielectric layer... selectively trapping electrons in the storage gate
Implementation Method 2
a channel region connecting the source region and the drain region
Data Source
AI summary
Embodiments the present disclosure provide a MTP memory cell and methods for forming the same. The MTP memory cell includes a FinFET transistor having a storage node formed around the channel region and a metal gate electrode around the storage node. The memory cell may be implemented by either n-channel transistor or p-channel transistor.