Fin-FET Passivation Layer Formation via Single CMP Process
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Solution Overview
Problem
The manufacturing process of Fin-FET devices is complex and inefficient due to the need for extra deposition and chemical mechanical polish (CMP) processes, as well as the use of additional photoresist, which increases costs and reduces efficiency.
Innovation Solution
A method for manufacturing Fin-FET devices without extra deposition processes, CMP processes, and photoresist, where the passivation layer is formed in both active and channel-isolation regions simultaneously, with only one CMP process to remove excess, and the fin structure in the channel-isolation region is recessed to avoid metal residues affecting the active region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If extra deposition and CMP processes are used to form passivation layer in active and channel-isolation regions separately, then device performance is improved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent combines the formation of passivation layers in active regions and channel-isolation regions into a single deposition process. The passivation layer is deposited conformally over the entire surface including both active and channel-isolation regions, eliminating the need for separate deposition and CMP processes for each region, thus reducing manufacturing complexity while maintaining device performance
Solution Approach 2:
The passivation layer serves multiple functions simultaneously: it provides electrical isolation in channel-isolation regions and protects the high-k metal gate stacks in active regions. This multi-functional approach allows a single deposition process to fulfill multiple purposes, reducing the overall number of manufacturing steps required
2Reliability
If extra photoresist is used for separate processing of active and channel-isolation regions, then device performance is improved, but manufacturing costs increase
Solution Approach 1:
The patent eliminates the need for separate photoresist processing for active and channel-isolation regions by using a single photoresist layer to define both regions simultaneously. The photoresist pattern is designed to expose both active and channel-isolation regions in one lithography step, reducing photoresist consumption and associated costs while maintaining the required processing precision
Solution Approach 2:
The photoresist layer performs multiple functions: it defines the boundaries of both active regions and channel-isolation regions in a single pattern, serves as the masking layer for the combined deposition process, and eliminates the need for multiple photoresist application and removal cycles, thereby reducing manufacturing costs
3Ease of manufacture
If fin structure in channel-isolation region is not recessed, then manufacturing process is simpler, but metal residues affect active region performance
Solution Approach 1:
The patent extracts or removes the fin structure in the channel-isolation region by recessing it below the surface level. This removal of protruding fin structures prevents metal residues from migrating into active regions during subsequent processing steps, thereby protecting device performance while maintaining manufacturing simplicity through a targeted structural modification
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs and enhances process efficiency by eliminating unnecessary steps and ensuring stable device performance by removing metal residues and simplifying the passivation layer formation.
Implementation Method 1
a passivation layer is formed on the high-k metal gate stacks and the recessed fin structure
Implementation Method 2
only one CMP process to remove excess
Data Source
AI summary
A fin-like field-effect transistor (Fin-FET) device includes a substrate, a fin structure disposed on the substrate, and an isolation structure disposed adjacent to the fin structure. The fin structure includes a recessed structure, which a bottom of the recessed structure is below a top surface of the isolation structure.