FinFET Source/Drain Epitaxy via Local Oxidation
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Solution Overview
Problem
Existing methods for forming source/drain regions in FinFET transistors face challenges with leakage currents and access resistance, particularly when the distance between transistors or gates decreases, and require high thermal budgets and multiple steps, including selective deoxidation with different semiconductor materials.
Innovation Solution
A method involving the formation of an additional insulation portion by oxidation of the semiconductor material on the substrate's upper face, followed by selective epitaxy of the source/drain regions, which does not modify the lateral channel and allows for a protective layer to prevent oxidation of the channel's side portions, thereby simplifying the process and reducing material constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selective deoxidation is performed to form an insulating portion beneath source and drain regions, then leakage currents are reduced, but different semiconductor materials are required for substrate and channel
Solution Approach 1:
The patent extracts the oxidation step from the conventional deoxidation process. Instead of requiring selective deoxidation of the channel after oxidation, the method forms the insulating portion by oxidizing only the base portion through controlled oxidation conditions, leaving the channel material unaffected and eliminating the need for subsequent deoxidation steps.
Solution Approach 2:
The patent applies local quality by creating spatially differentiated oxidation conditions. The oxidation is performed selectively on the base portion (first semiconductor material) while protecting the channel (second semiconductor material) through controlled exposure, resulting in an insulating portion only where needed beneath the source and drain regions.
2Reliability
If multiple steps including selective deoxidation are performed, then insulation performance is improved, but process complexity increases
Solution Approach 1:
The patent merges the formation of the insulating portion with the existing oxidation steps in the FinFET fabrication process. By integrating the insulating portion formation into the standard oxidation sequence and using the gate and spacers as natural masks, the method eliminates separate deoxidation steps while achieving the same insulation performance.
Solution Approach 2:
The patent makes the gate and spacer structures serve multiple functions: they act as both the transistor functional elements and as masks during oxidation to define the insulating portion geometry. This multi-functionality eliminates the need for additional mask layers and simplifies the process flow.
3Reliability
If oxidation is performed on exposed surfaces to form insulating portion, then leakage currents are reduced, but channel lateral surfaces may be modified
Solution Approach 1:
The patent performs preliminary protective actions by ensuring the channel lateral surfaces are covered by gate and spacer structures before oxidation begins. This preliminary configuration prevents oxidation from reaching the channel facets, preserving their integrity for subsequent source and drain epitaxy while still allowing oxidation of the base portion where needed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces leakage currents, eliminates the need for different semiconductor materials, and simplifies the process by avoiding dimensional shrinkage, achieving insulation performance similar to a 'semiconductor on insulator' type substrate at a lower cost, while improving electrical isolation and reducing access resistance.
Implementation Method 1
forming an additional insulation portion in the base portion, by oxidation of the semiconductor material from the upper face of the base portion
Implementation Method 2
forming by selective epitaxy, mainly along the longitudinal axis, the source/drain region, notably from said channel facet
Data Source
Figure 1A~1B
Figure 1C~1D
Figure 2A~2B
AI summary
The invention relates to a method for forming a source/drain region (51, 52) of a transistor, comprising the following steps: - Providing a substrate (1) bearing a transistor motif (2), comprising a base portion (10) having an upper face (100) elongated along an axis (x), a channel (20, 21) surmounting the base portion (10), and a spacer (4) transversely surrounding a lateral portion (210, 220) of the channel (20, 21), - forming a protective layer (40) on a facet (211a-211i, 221a-221i) of the channel, so as to prevent oxidation of the lateral portion (210, 220) of the channel (20), - forming an additional insulating portion (110, 120) in the base portion (10), by oxidation from the upper face (100), - removing the protective layer (40) so as to expose the facet (211a-211i, 221a-221i), - Form by lateral epitaxy, the source/drain region (51, 52) from said facet (211a-211i, 221a-221i).