FinFET SRAM Contact Dimensioning for Gate Bridging Tolerance

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Solution Overview

Problem

Existing FinFET SRAM devices face issues with gate-to-contact bridging due to variations in gate profile, particularly at the end portions, which can degrade performance and reliability, as conventional designs have not adequately addressed these shortcomings.

Innovation Solution

The dimensions of Vss and node contacts are shrunk in the X-direction to reduce the risk of bridging with adjacent gate structures, and the layout design is revised to ensure larger gaps between contacts and gate structures, thereby minimizing the likelihood of physical contact and bridging.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If contact dimensions are reduced, then bridging risk with gate structures is reduced, but contact resistance may increase

Engineering Contradiction:
Improvebridging riskVSAvoidcontact resistance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies different contact dimensions selectively: contacts adjacent to gate structures are reduced in the first direction to minimize bridging risk, while contacts not adjacent to gates maintain standard dimensions. This local differentiation resolves the contradiction by applying dimension reduction only where bridging risk exists, rather than uniformly across all contacts.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent reduces contact dimensions specifically in the first direction (lateral dimension adjacent to gate) while maintaining or adjusting the second direction (depth dimension). This dimensional differentiation allows bridging prevention in the critical lateral direction while managing contact resistance through the depth dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If contact dimensions are reduced, then layout flexibility is improved, but signal integrity may deteriorate

Engineering Contradiction:
Improvelayout flexibilityVSAvoidsignal integrity
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements local dimension reduction only for contacts adjacent to gate structures, while other contacts maintain standard dimensions. This selective approach provides layout flexibility where needed (near gates) while preserving signal integrity for contacts where larger dimensions are beneficial.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the dimensional parameters of specific contacts based on their location and function. Contacts near gates have reduced first-direction dimensions for flexibility, while other contacts maintain dimensions optimized for signal integrity, allowing both requirements to be satisfied simultaneously.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11792969B2Preventing gate-to-contact bridging by reducing contact dimensions in FinFET SRAM
Publication Date: 2023.10.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11792969B2 patent drawing
  • US11792969B2 patent drawing
  • US11792969B2 patent drawing

AI summary

A static random access memory (SRAM) cell includes a first gate and a second gate each extending in a first direction. A first gap separates the first gate from the second gate in the first direction. The SRAM cell includes a Vcc contact extending in the first direction. A second gap separates the Vcc contact and the first gate in a second direction perpendicular to the first direction. No segment of the Vcc contact overlaps with the first gap in the first direction. The SRAM cell includes a Vss contact extending in the first direction. A third gap separates the Vss contact from the first gate in the second direction. A segment of the Vss contact is disposed to the first gap. The Vss contact is smaller than the Vcc contact in the second direction.