Composite Stress Layer for FinFET Fin Buckling Control
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Solution Overview
Problem
Advanced integrated circuits with fin active regions face fin buckling issues due to high aspect ratios and mechanical weakness, which degrade device performance and lead to contact to gate bridging concerns.
Innovation Solution
A semiconductor structure and method utilizing a composite stress layer with engineered dielectric materials, including multiple stress layers with varying compressive and tensile stresses, to anchor fin active regions and prevent buckling, while also functioning as a hard mask during patterning processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fin width is reduced for short channel control, then device performance is improved, but fin mechanical strength deteriorates leading to buckling
Solution Approach 1:
The patent changes the physical and chemical parameters of the fin structure by forming a composite stress layer with specific material composition (silicon nitride and silicon oxynitride), thickness (5-20 nm), and stress characteristics (compressive stress of 1-3 GPa). These parameter changes enhance the fin's mechanical strength without altering the fin width, thereby preventing buckling while maintaining short channel control and device performance.
Solution Approach 2:
The patent applies composite materials by creating a composite stress layer comprising multiple dielectric materials (silicon nitride and silicon oxynitride) with different mechanical and stress properties. This composite structure provides both mechanical support to prevent fin buckling and appropriate stress characteristics to maintain device performance, resolving the contradiction between fin strength and performance.
2Reliability
If fin aspect ratio is increased for short channel control, then device performance is improved, but fin stability deteriorates causing buckling during processing
Solution Approach 1:
The patent implements beforehand cushioning by forming a composite stress layer on the fin structure before subsequent processing steps. This pre-applied stress layer acts as a mechanical cushion that prevents buckling during high-aspect-ratio fin formation and subsequent processing, thereby maintaining fin stability while enabling the high aspect ratios needed for device performance.
Solution Approach 2:
The patent modifies the stress state parameter of the fin structure by introducing a composite stress layer with controlled compressive stress (1-3 GPa). This parameter change in the stress state provides mechanical support that stabilizes high-aspect-ratio fins, preventing buckling while allowing the fins to maintain the high aspect ratios necessary for short channel control and device performance.
3Stability of the object's composition
If composite stress layer is added to prevent fin buckling, then fin stability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the composite stress layer to perform multiple functions simultaneously: (1) providing mechanical support to prevent fin buckling, (2) serving as a hard mask for patterning processes, and (3) delivering stress control for device performance. This multi-functionality reduces the need for separate structures, thereby limiting the increase in device complexity while achieving fin stability.
Solution Approach 2:
The patent merges multiple functions into a single composite stress layer structure. Instead of requiring separate stress management and hard mask layers, the composite stress layer combines both functions, along with stress control, into one integrated structure. This merging approach improves fin stability while minimizing the increase in device complexity by reducing the total number of discrete layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces fin buckling and improves line-end roughness to less than 2.5 nm, enhancing device performance and stability in advanced technology nodes.
Implementation Method 1
A semiconductor structure and method utilizing a composite stress layer with engineered dielectric materials, including multiple stress layers with varying compressive and tensile stresses, to anchor fin active regions and prevent buckling
Data Source
AI summary
The present disclosure provides one embodiment of a method making semiconductor structure. The method includes forming a composite stress layer on a semiconductor substrate, wherein the forming of the composite stress layer includes forming a first stress layer of a dielectric material with a first compressive stress and forming a second stress layer of the dielectric material with a second compressive stress on the first stress layer, the second compressive stress being greater than the first compressive stress; and patterning the semiconductor substrate to form fin active regions using the composite stress layer as an etch mask.