FinFET Stress Application Layer for Height Direction Carrier Mobility
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional FinFET technologies apply stress perpendicular to the height direction of fins, which is not effective in improving carrier mobility, whereas applying stress in the height direction is known to be more effective but not adequately addressed.
Innovation Solution
A semiconductor device with a stress application layer on the gate electrode made of a conductive material with a different linear expansion coefficient than the fin material, and a plug layer with higher Young's modulus than the fin material, applied in the height direction to enhance carrier mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stress is applied perpendicular to the height direction of fins using conventional insulating films, then the structure is simple to manufacture, but carrier mobility improvement is insufficient
Solution Approach 1:
The patent changes the stress application direction from perpendicular to the fin height direction to parallel with the fin height direction. This parameter change enables effective carrier mobility improvement by applying stress along the channel length, which is the critical direction for carrier transport in FinFETs.
Solution Approach 2:
The patent employs a composite structure consisting of a stress application layer made from conductive material with specific linear expansion coefficient characteristics, combined with a plug layer having higher Young's modulus. This composite material approach enables effective stress application in the height direction while maintaining electrical conductivity and structural integrity.
2Reliability
If more stress is applied to the channel region to improve carrier mobility, then carrier mobility improves, but the conventional structure cannot apply sufficient stress in the height direction
Solution Approach 1:
The patent utilizes thermal expansion differences between the stress application layer material and the fin material. By selecting a conductive material with a linear expansion coefficient at the forming temperature that differs from that of silicon, the patent generates thermal stress in the height direction during cooling, effectively applying stress to improve carrier mobility.
Solution Approach 2:
The patent changes the stress application direction from perpendicular to the fin height direction to parallel with the fin height direction. This parameter change enables effective carrier mobility improvement by applying stress along the channel length, which is the critical direction for carrier transport in FinFETs.
3Stress or pressure
If a stress application layer with different linear expansion coefficient is used, then stress can be applied in the height direction, but material selection and process control become more complex
Solution Approach 1:
The patent specifies that the conductive material should have a linear expansion coefficient at the forming temperature that is 0.5×10^-6/K to 2.0×10^-6/K, which is smaller than silicon's linear expansion coefficient. This parameter specification enables effective stress application while providing clear material selection criteria for manufacturing.
Solution Approach 2:
The patent applies stress locally to the fin structure through the stress application layer and plug layer configuration. The stress is concentrated in the region where it is most needed - at the fin-root portion - rather than uniformly distributed, which improves manufacturing efficiency by targeting the critical stress application zone.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively applies compressive or tensile stress to the fins in the height direction, improving carrier mobility beyond conventional FinFET structures by utilizing materials with specific linear expansion coefficient differences and Young's modulus properties.
Implementation Method 1
a stress application layer formed on a top surface of the gate electrode, and formed by a conductive material of which a difference between linear expansion coefficients at a temperature of forming a stress application layer and a room temperature is different from a difference between linear expansion coefficients of the fin at the temperature of forming the stress application layer and the room temperature
Implementation Method 2
a plug layer formed on the stress application layer and above the fin, and made of a conductive material having larger Young's modulus than that of the fin
Data Source
AI summary
A semiconductor device according to an embodiment of the present invention comprises: a semiconductor substrate; a first field-effect transistor formed on the semiconductor substrate, and including a fin constituted by a semiconductor layer having source and drain regions via a channel region in an extending direction, and a gate electrode formed on the channel region via an insulating film; a stress application layer formed on a top surface of the gate electrode, and formed by a conductive material of which a difference between linear expansion coefficients at a temperature of forming a stress application layer and a room temperature is different from a difference between linear expansion coefficients of the fin at the temperature of forming the stress application layer and the room temperature, and a plug layer formed on the stress application layer and above the fin, and made of a conductive material having larger Young's modulus than that of the fin.