FinFET Stressor Layer Structure for Strain-Controlled Channels
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in manufacturing fin field effect transistors (Fin FETs) due to difficulties in forming high-aspect-ratio fin structures and achieving optimal carrier mobility and strain distribution, which affect device performance and reliability.
Innovation Solution
The process involves forming a fin structure with a well layer, an oxide layer, and a channel layer, followed by the growth of epitaxial layers in a bottom-up profile within recessed portions to create a stressor layer that applies appropriate stress to the channel layer, enhancing carrier mobility and suppressing short channel effects, while using a dielectric layer to control epitaxial growth and prevent defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high-aspect-ratio fin structures are formed to increase device density, then device density is improved, but manufacturing difficulty increases
Solution Approach 1:
The patent applies preliminary action by forming the oxide layer and epitaxial layers in a specific bottom-up sequence before final fin structure completion. The oxide layer is grown first to define the fin footprint, followed by selective epitaxial growth in recessed portions, preparing the structure in advance for subsequent processing steps and reducing overall manufacturing complexity
Solution Approach 2:
The fin structure is segmented into multiple functional layers: well layer, oxide layer, channel layer, and stressor layer. This segmentation allows each layer to be optimized independently for its specific function, making the complex high-aspect-ratio structure more manageable through modular fabrication processes
2Reliability
If strain is increased to enhance carrier mobility, then carrier mobility is improved, but strain distribution control becomes more difficult
Solution Approach 1:
The stressor layer is applied locally in recessed portions of the fin structure rather than uniformly across the entire surface. This local quality approach allows strain to be concentrated precisely where needed in the channel region, enhancing carrier mobility while maintaining precise control over strain distribution through targeted epitaxial growth in specific geometric locations
Solution Approach 2:
The patent changes material parameters by using different semiconductor materials with different lattice constants for the stressor layer compared to the channel layer. This parameter change creates controlled strain through lattice mismatch, enabling precise control of strain magnitude and distribution by adjusting material composition and layer thickness
3Reliability
If epitaxial layers are grown to create stressor layer, then carrier mobility is enhanced, but process complexity increases
Solution Approach 1:
The epitaxial growth process is performed periodically in a cyclic manner: growth in recessed portions, planarization, then repeat. This periodic action breaks down the complex multi-layer epitaxial process into manageable repeating cycles, enhancing carrier mobility through controlled strain while reducing overall process complexity through modular repetition
Solution Approach 2:
The oxide layer serves as an intermediary between the well layer and the epitaxial stressor layers. This intermediary layer facilitates controlled epitaxial growth by providing a stable foundation and defining the precise locations where stressor layers will form, simplifying the overall process by mediating the interaction between different material systems
4Reliability
If fin structure aspect ratio is increased to improve device performance, then device performance is improved, but short channel effects increase
Solution Approach 1:
The patent transitions from planar device architecture to three-dimensional fin structures with significant aspect ratios. This dimensional change increases the effective channel area and improves device performance while the gate wraps around the fin to provide enhanced electrostatic control that suppresses short channel effects through improved field distribution in the vertical dimension
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves carrier mobility, reduces short channel effects, and enhances the strain distribution in Fin FETs, leading to better device performance and reduced leakage, thereby addressing the challenges of high-aspect-ratio fin structure fabrication and carrier mobility.
Implementation Method 1
the growth of epitaxial layers in a bottom-up profile within recessed portions to create a stressor layer
Data Source
AI summary
A fin field effect transistor (Fin FET) device includes a fin structure extending in a first direction and protruding from an isolation insulating layer disposed over a substrate. The fin structure includes a well layer, an oxide layer disposed over the well layer and a channel layer disposed over the oxide layer. The Fin FET device includes a gate structure covering a portion of the fin structure and extending in a second direction perpendicular to the first direction. The Fin FET device includes a source and a drain. Each of the source and drain includes a stressor layer disposed in recessed portions formed in the fin structure. The stressor layer extends above the recessed portions and applies a stress to a channel layer of the fin structure under the gate structure. The Fin FET device includes a dielectric layer formed in contact with the oxide layer and the stressor layer in the recessed portions.