FinFET Stressor Placement for Current and Voltage Control
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Solution Overview
Problem
Current semiconductor device fabrication methods for finFETs face challenges in optimizing performance characteristics, such as drive current and threshold voltage, due to limitations in inducing stress and uniformity across n-channel and p-channel transistors.
Innovation Solution
The method involves forming tensile and compressive stressors near semiconductor fins using neutral stress materials, which are annealed to induce specific stresses, optimizing fin lengths and stressor placement to enhance performance, particularly by using flowable oxide fillings and configuring distances to improve effective current and threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If stressors are formed near semiconductor fins to improve device performance, then effective current increases, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by forming stressors with specific material compositions and geometric configurations. The stressors are formed with controlled dimensions, positions, and material properties to generate specific stress states (tensile or compressive) in the channel region, thereby modulating device performance through parameter optimization rather than fundamental design changes
Solution Approach 2:
The patent implements local quality by placing different types of stressors (tensile and compressive) at specific locations near different fins. The stressor configuration is tailored locally to achieve desired stress distribution in the channel region, with stressors positioned at optimized distances from fin surfaces to maximize performance improvement while minimizing manufacturing complexity
2Productivity
If stressor placement is optimized to reduce threshold voltage, then device performance improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by pre-configuring stressors with specific geometric parameters and material properties before the actual stress application. The stressors are formed with predetermined dimensions, positions, and compositions that are optimized in advance to achieve the desired threshold voltage reduction, eliminating the need for complex real-time adjustments during manufacturing
Solution Approach 2:
The patent uses parameter changes to optimize stressor placement by varying geometric parameters (distance from fin, stressor dimensions) and material parameters (composition, stress state) to achieve the target threshold voltage. This approach allows for performance optimization through parameter tuning rather than requiring ultra-precise placement, thereby reducing manufacturing precision requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the performance of finFET devices by increasing effective current and reducing threshold voltage, achieving more uniform device performance across the wafer and enhancing overall yield.
Implementation Method 1
The stressors are a neutral stress material
Implementation Method 2
forming a tensile stressor near a first semiconductor fin... forming a compressive stressor near a second semiconductor fin
Data Source
AI summary
A method of forming an improved field-effect transistor device is provided. The method includes forming a tensile stressor near a first semiconductor fin. The first semiconductor fin is a fin of an n-channel field-effect transistor. The n-channel field-effect transistor is formed on a substrate. The method also includes forming a compressive stressor near a second semiconductor fin. The second semiconductor fin is a fin of a p-channel field effect transistor. The p-channel field-effect transistor is formed on the substrate. The method can also include forming neutral material over the at least one n-channel and p-channel field effect transistor. The method can also include achieving different device performance by configuring a stressor distance to fin and/or by configuring a stressor volume.