FinFET Body Contact Structure for Heat Dissipation
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Solution Overview
Problem
Fin Field-Effect Transistors (FinFETs) manufactured on SOI substrates face high manufacturing costs, poor heat dissipation, and significant floating body effects, such as kink and parasitic bipolar transistor effects, which affect device performance and compatibility with CMOS processes.
Innovation Solution
A semiconductor FET structure and manufacturing method that forms a fin on a buried isolation dielectric layer with a body-contact connecting the channel region to the substrate, allowing direct physical and electrical contact, and includes a gate electrode perpendicular to the fin, source, and drain regions, using a bulk silicon substrate to alleviate floating body effects and improve heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If FinFET is manufactured on SOI substrate, then manufacturing process is simpler, but manufacturing cost increases and heat dissipation performance deteriorates
Solution Approach 1:
The patent applies local quality by creating a selective body contact structure that connects only specific regions of the fin channel to the substrate. The isolation dielectric layer selectively isolates certain parts of the fin while allowing body contact in other regions, enabling localized thermal management and electrical connection to resolve the heat dissipation issue without compromising the overall manufacturing simplicity of SOI-based FinFET
2Ease of manufacture
If FinFET is manufactured on SOI substrate, then manufacturing process is simpler, but floating body effects increase
Solution Approach 1:
The patent extracts the harmful floating body effect by introducing a body contact structure that connects the fin channel to the substrate through the isolation dielectric layer. This extraction removes the floating potential that causes kink effect, parasitic bipolar transistor effect, and hysteresis, while preserving the simplified SOI manufacturing process
3Reliability
If BOX is added to SOI FinFET for isolation, then device isolation is improved, but heat dissipation performance deteriorates
Solution Approach 1:
The patent applies local quality by creating a selective body contact structure that connects only specific regions of the fin channel to the substrate. The isolation dielectric layer selectively isolates certain parts of the fin while allowing body contact in other regions, enabling localized thermal management and electrical connection to resolve the heat dissipation issue without compromising the overall manufacturing simplicity of SOI-based FinFET
Data Source
AI summary
The present application discloses a semiconductor Field-Effect Transistor (FET) structure and a method for manufacturing the same, wherein the method comprises: forming a semiconductor substrate comprising an SOI structure having a body-contact hole; forming a fin on the SOI structure of the semiconductor substrate; forming a gate stack structure on top and side faces of the fin; forming source/drain structures in the fin on both sides of the gate stack structure; and performing metallization. The present invention makes use of traditional quasi-planar based top-down processes, thus the manufacturing process thereof becomes simple to implement; the present invention exhibits good compatibility with CMOS planar process and can be easily integrated; the present invention also is favorable for suppressing short channel effects desirably, and boosts MOSFETs to develop towards a trend of downscaling size.