Firmware Update Logical Address Remapping

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Solution Overview

Problem

Conventional systems require resets during resource updates, leading to system unavailability and clock cycle expenditure, which is undesirable for high-availability systems.

Innovation Solution

A memory mapper is used to remap logical addresses to different physical addresses without resetting, allowing continuous system operation by switching from an active resource to a candidate resource within one clock cycle.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a reset-based process is used to update firmware resources, then the device can switch from the previous version to the updated version of the resource, but the device becomes unusable during the reset process

Engineering Contradiction:
Improvefirmware update capabilityVSAvoiddevice availability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent divides the address space into multiple segments (first address space for previous version, second address space for updated version) that can be independently managed. The memory mapper is segmented to handle different address space mappings, allowing the system to switch between segments without resetting the entire device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory mapper serves as an intermediary component between the processor and the firmware resources. It mediates address translation by mapping logical addresses to physical addresses in different address spaces, enabling seamless switching between firmware versions without requiring device reset.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a reset-based process is used to update firmware resources, then the device can complete the switch-over from the currently executing copy to the updated copy, but clock cycles are expended during the reset

Engineering Contradiction:
Improvefirmware update capabilityVSAvoidclock cycle expenditure
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-loading the updated firmware resource into the second address space before switching is needed. The memory mapper is pre-configured with mapping information for both address spaces, so when an update is required, the switch can occur immediately without time-consuming reset sequences.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous execution of firmware resources by maintaining the processor in an active state throughout the update process. The memory mapper continuously translates addresses, and the processor continues executing instructions without interruption, eliminating the loss of clock cycles that would occur during device reset.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If the device is reset to complete the firmware update, then the new version of the resource can be executed, but the previously saved state must be reconfigured

Engineering Contradiction:
Improvefirmware version switchingVSAvoidreconfiguration process
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system creates a copy of the firmware resource in a separate address space (second address space) rather than modifying the existing one. This copy can be independently validated and switched to without affecting the original resource or requiring complex reconfiguration of device state.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The memory mapper implements dynamic address space mapping that can be changed on-the-fly without resetting the device. The mapping configuration is dynamic and can be modified during operation, allowing the system to switch between different firmware versions by simply changing the mapping parameters rather than reconfiguring the entire device state.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20240427588A1Firmware update with logical address remapping
Publication Date: 2024.12.26 TEXAS INSTRUMENTS INC
  • US20240427588A1 patent drawing
  • US20240427588A1 patent drawing
  • US20240427588A1 patent drawing

AI summary

A system includes memory which has a first resource at a first physical address space that includes a first physical address, and a second resource at a second physical address space that includes a second physical address. A memory mapper is coupled to the memory. The memory mapper is configured to convert logical addresses to physical addresses. A processor is coupled to the memory mapper. The processor is configured to execute the first resource from a first logical address mapped by the memory mapper to the first physical address. While executing a firmware update resource, the processor can remap the first logical address to the second physical address using the memory mapper and then execute the second resource from the first logical address.