Fixed-Point Matrix Multiplier with Binary MAC for Low-Area AI Chips
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Solution Overview
Problem
Existing deep learning technologies face challenges in efficiently implementing large computing power required for matrix multiplication operations in small semiconductor devices, such as those used in mobile and IoT applications, leading to increased area occupation, power consumption, and reduced yield and reliability of circuits.
Innovation Solution
A matrix multiplier and MAC operator are designed as a single piece of hardware that performs multiplication and accumulation operations using scale factors and binary values, converting input matrices to fixed-point and then back to floating-point, reducing circuit area and improving integration density, power consumption, and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If deep learning is implemented using general-purpose processors in small semiconductor devices, then computing power is sufficient, but area occupation increases and integration density decreases
Solution Approach 1:
The patent segments the matrix multiplication operation into multiple stages: input matrix reception, weight matrix multiplication, scaling operation, and accumulation. This segmentation allows each component to be optimized independently for area efficiency while maintaining overall computing power.
Solution Approach 2:
The patent changes the parameter representation by using scale factors to represent weight matrices instead of full-precision floating-point numbers. This parameter transformation reduces the area required for storing and processing weight data while maintaining computational accuracy through the scaling mechanism.
2Power
If deep learning is implemented using general-purpose processors in small semiconductor devices, then computing power is sufficient, but power consumption increases
Solution Approach 1:
By representing weight matrices as scale factors rather than full-precision floating-point values, the patent reduces the number of bits required for data transmission and processing, directly lowering power consumption while maintaining computing power.
Solution Approach 2:
The patent divides the computation into distinct phases where scaling and accumulation are separated. This allows the system to use lower-power operations for the majority of computations (accumulation of scaled values) while reserving higher-power operations for less frequent scaling operations.
3Power
If deep learning is implemented using general-purpose processors in small semiconductor devices, then computing power is sufficient, but circuit reliability decreases
Solution Approach 1:
The patent introduces scale factors as an additional parameter that enables more precise control over weight values. This parameter enhancement allows for better numerical stability and reduced error propagation in floating-point operations, thereby improving circuit reliability.
Solution Approach 2:
The accumulation mechanism in the patent provides feedback by continuously summing the scaled products, which helps maintain numerical accuracy and prevents error accumulation that would otherwise degrade reliability in high-speed computing operations.
Data Source
AI summary
A matrix multiplier includes an input vector scaler configured to generate a scaled input matrix based on a first input matrix and a plurality of scale factors, a first data type converter configured to convert the data type of the scaled input matrix to fixed-point and generate a fixed-point input matrix, a multiplication and accumulation operator array configured to receive the fixed-point input matrix and a plurality of binary vectors, generate a fixed-point output matrix based on the fixed-point input matrix and the plurality of binary vectors, generate the first input matrix and the second input matrix, and generate a first output matrix based on the first input matrix and the second input matrix, and a second data type converter configured to convert the data type of the fixed-point output matrix to a floating point and generate a second output matrix.