Flash Memory Bit Line Precharge via Selective Grounding
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Solution Overview
Problem
In flash memory systems, bit line to bit line capacitance and resistance between selected and unselected bit lines affect precharge and sensing times during read operations, leading to inefficiencies.
Innovation Solution
A connector system that selectively connects bit lines to ground or a precharge path based on their state, reducing bit line to bit line capacitance and resistance, and optimizing precharge times by connecting selected bit lines to the precharge path and unselected bit lines to ground.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If bit lines are left floating during read operations, then the memory structure remains simple, but precharge time increases and sensing accuracy deteriorates due to bit line to bit line capacitance and resistance
Solution Approach 1:
The bit line system is segmented into selected and unselected groups, with different connection states applied to each group. Selected bit lines are connected to the precharge path while unselected bit lines are connected to ground, allowing differentiated treatment that optimizes precharge time for active lines without unnecessarily complicating the entire system
Solution Approach 2:
The connector is configured to preliminarily establish appropriate connection states for bit lines before read operations begin. By pre-configuring selected bit lines to the precharge path and unselected bit lines to ground, the system eliminates delays that would occur if connections were established during the read operation itself
2Reliability
If unselected bit lines are not connected to ground, then the device structure remains simpler, but sensing accuracy and read operation efficiency deteriorate due to residual charges and interference
Solution Approach 1:
Different connection qualities are applied locally to different bit lines based on their selection state. Unselected bit lines are specifically connected to ground to provide a stable reference potential and eliminate residual charges, while selected bit lines maintain their precharge connection. This localized differentiation improves sensing accuracy without requiring system-wide structural changes
Solution Approach 2:
The connector acts as an intermediary element that mediates between the bit lines and the ground/precharge paths. By introducing this intermediate connection component, the system achieves improved sensing accuracy through proper bit line termination without directly modifying the bit line structures themselves
3Speed
If bit line to bit line capacitance and resistance are not reduced, then the connector design remains simpler, but precharge time increases and read operation speed decreases
Solution Approach 1:
The connector design implements dynamic connection states that change based on the read operation requirements. During read operations, the connector dynamically configures selected bit lines to the precharge path and unselected bit lines to ground, creating an adaptive system that optimizes speed performance when needed while maintaining structural simplicity at other times
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the precharge time of selected bit lines and enhances the driving of unselected bit lines to ground, thereby enhancing the overall efficiency of read operations in flash memory systems.
Implementation Method 1
A bit line to bit line capacitance and a bit line to bit line resistance between a selected bit line and an unselected bit line may affect a precharge time and/or a sensing time of the selected bit line
Implementation Method 2
A bit line to bit line capacitance and a bit line to bit line resistance between a selected bit line and an unselected bit line may affect a precharge time and/or a sensing time of the selected bit line
Data Source
AI summary
Device, system, and method of bit line selection of a flash memory. In some demonstrative embodiments, the method may include connecting to ground at least one location along at least one bit line of a flash memory when the bit line is at an unselected state, wherein the bit line is connected to a multiplexer, and wherein at least one memory sector is coupled to the bit line between the multiplexer and the location; and connecting the location to a precharge path when the bit line is at a selected state.