Flash Memory Controller Decoding Using Collaborative 4 KB Codewords

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Solution Overview

Problem

The use of larger LDPC encoders in flash memory controllers results in inefficient decoding when handling smaller data sizes, as they require reading and decoding entire larger codewords, reducing efficiency, especially with frequent small data read requests.

Innovation Solution

Implementing a collaborative codeword mechanism using a 4 KB encoder with a smaller chip area to generate 16 KB encoding information, allowing for efficient decoding of 4 KB codewords and utilizing successfully decoded codewords to decode failed ones.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a 16 KB LDPC encoder is used to enhance error correction capabilities, then error correction performance is improved, but decoding efficiency deteriorates when handling smaller data sizes

Engineering Contradiction:

Improveerror correction capabilitiesVSAvoiddecoding efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent segments the 16 KB codeword into multiple 4 KB codewords. When a read request for smaller data arrives, only the relevant 4 KB segment is decoded instead of the entire 16 KB codeword, significantly improving decoding efficiency for small data operations while maintaining the error correction benefits of the larger LDPC structure.

Inventive Principle:

Principle #1Segmentation

2Reliability

If a 16 KB LDPC encoder is used to encode data, then error correction capabilities are enhanced, but chip area increases

Engineering Contradiction:

Improveerror correction capabilitiesVSAvoidchip area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple 4 KB LDPC encoders to functionally equivalent a 16 KB LDPC encoder. By combining the encoding capabilities of smaller units, the system achieves the error correction performance of a large encoder while using smaller, more area-efficient building blocks that can be selectively activated.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If the decoder reads the entire 16 KB codeword for decoding, then error correction is performed on all data, but decoding time increases for smaller data requests

Engineering Contradiction:

Improveerror correctionVSAvoiddecoding time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and decodes only the necessary portion of the codeword based on the read request size. For a 4 KB read request, only the corresponding 4 KB segment is extracted and decoded, eliminating the time penalty of decoding the entire 16 KB codeword while still providing error correction for the requested data.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS20260037377A1Control method of flash memory controller for efficient decoding

Publication Date: 2026.02.05 SILICON MOTION INC

AI summary

The present invention provides a control method of a flash memory controller, which include steps of: receiving multiple data from a host device; encoding the multiple data to generate multiple codewords, respectively, wherein each of the multiple codewords comprises corresponding data and parity; writing the multiple codewords into a page of a block of a flash memory module; receiving a read command from the host device, wherein the read command requires the multiple codewords stored in the page; reading the multiple codewords from the page; sequentially decoding the multiple codewords to generate a decoding result; and in response to the decoding result indicating that at least one of the multiple codewords fails to be successfully decoded, using information of the successfully decoded codeword(s) to decode unsuccessfully decoded codeword(s).